1*c66ec88fSEmmanuel VadotBCM2836 per-CPU interrupt controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotThe BCM2836 has a per-cpu interrupt controller for the timer, PMU 4*c66ec88fSEmmanuel Vadotevents, and SMP IPIs. One of the CPUs may receive interrupts for the 5*c66ec88fSEmmanuel Vadotperipheral (GPU) events, which chain to the BCM2835-style interrupt 6*c66ec88fSEmmanuel Vadotcontroller. 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel VadotRequired properties: 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel Vadot- compatible: Should be "brcm,bcm2836-l1-intc" 11*c66ec88fSEmmanuel Vadot- reg: Specifies base physical address and size of the 12*c66ec88fSEmmanuel Vadot registers 13*c66ec88fSEmmanuel Vadot- interrupt-controller: Identifies the node as an interrupt controller 14*c66ec88fSEmmanuel Vadot- #interrupt-cells: Specifies the number of cells needed to encode an 15*c66ec88fSEmmanuel Vadot interrupt source. The value shall be 2 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel VadotPlease refer to interrupts.txt in this directory for details of the common 18*c66ec88fSEmmanuel VadotInterrupt Controllers bindings used by client devices. 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel VadotThe interrupt sources are as follows: 21*c66ec88fSEmmanuel Vadot 22*c66ec88fSEmmanuel Vadot0: CNTPSIRQ 23*c66ec88fSEmmanuel Vadot1: CNTPNSIRQ 24*c66ec88fSEmmanuel Vadot2: CNTHPIRQ 25*c66ec88fSEmmanuel Vadot3: CNTVIRQ 26*c66ec88fSEmmanuel Vadot8: GPU_FAST 27*c66ec88fSEmmanuel Vadot9: PMU_FAST 28*c66ec88fSEmmanuel Vadot 29*c66ec88fSEmmanuel VadotExample: 30*c66ec88fSEmmanuel Vadot 31*c66ec88fSEmmanuel Vadotlocal_intc: local_intc { 32*c66ec88fSEmmanuel Vadot compatible = "brcm,bcm2836-l1-intc"; 33*c66ec88fSEmmanuel Vadot reg = <0x40000000 0x100>; 34*c66ec88fSEmmanuel Vadot interrupt-controller; 35*c66ec88fSEmmanuel Vadot #interrupt-cells = <2>; 36*c66ec88fSEmmanuel Vadot interrupt-parent = <&local_intc>; 37*c66ec88fSEmmanuel Vadot}; 38