xref: /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/arm,versatile-fpga-irq.yaml (revision ae5de77ed78ae54d86cead5604869212e8008e6b)
1*ae5de77eSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*ae5de77eSEmmanuel Vadot%YAML 1.2
3*ae5de77eSEmmanuel Vadot---
4*ae5de77eSEmmanuel Vadot$id: http://devicetree.org/schemas/interrupt-controller/arm,versatile-fpga-irq.yaml#
5*ae5de77eSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*ae5de77eSEmmanuel Vadot
7*ae5de77eSEmmanuel Vadottitle: ARM Versatile FPGA IRQ Controller
8*ae5de77eSEmmanuel Vadot
9*ae5de77eSEmmanuel Vadotmaintainers:
10*ae5de77eSEmmanuel Vadot  - Linus Walleij <linus.walleij@linaro.org>
11*ae5de77eSEmmanuel Vadot
12*ae5de77eSEmmanuel Vadotdescription:
13*ae5de77eSEmmanuel Vadot  One or more FPGA IRQ controllers can be synthesized in an ARM reference board
14*ae5de77eSEmmanuel Vadot  such as the Integrator or Versatile family. The output of these different
15*ae5de77eSEmmanuel Vadot  controllers are OR:ed together and fed to the CPU tile's IRQ input. Each
16*ae5de77eSEmmanuel Vadot  instance can handle up to 32 interrupts.
17*ae5de77eSEmmanuel Vadot
18*ae5de77eSEmmanuel Vadotproperties:
19*ae5de77eSEmmanuel Vadot  compatible:
20*ae5de77eSEmmanuel Vadot    const: arm,versatile-fpga-irq
21*ae5de77eSEmmanuel Vadot
22*ae5de77eSEmmanuel Vadot  interrupt-controller: true
23*ae5de77eSEmmanuel Vadot
24*ae5de77eSEmmanuel Vadot  '#interrupt-cells':
25*ae5de77eSEmmanuel Vadot    const: 1
26*ae5de77eSEmmanuel Vadot
27*ae5de77eSEmmanuel Vadot  reg:
28*ae5de77eSEmmanuel Vadot    maxItems: 1
29*ae5de77eSEmmanuel Vadot
30*ae5de77eSEmmanuel Vadot  clear-mask:
31*ae5de77eSEmmanuel Vadot    description: A mask written to clear all IRQs on the controller at boot.
32*ae5de77eSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/uint32
33*ae5de77eSEmmanuel Vadot
34*ae5de77eSEmmanuel Vadot  valid-mask:
35*ae5de77eSEmmanuel Vadot    description:
36*ae5de77eSEmmanuel Vadot      A bit mask determining which interrupts are valid; unused lines are set to 0.
37*ae5de77eSEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/uint32
38*ae5de77eSEmmanuel Vadot
39*ae5de77eSEmmanuel Vadot  interrupts:
40*ae5de77eSEmmanuel Vadot    maxItems: 1
41*ae5de77eSEmmanuel Vadot
42*ae5de77eSEmmanuel VadotadditionalProperties: false
43*ae5de77eSEmmanuel Vadot
44*ae5de77eSEmmanuel Vadotrequired:
45*ae5de77eSEmmanuel Vadot  - compatible
46*ae5de77eSEmmanuel Vadot  - interrupt-controller
47*ae5de77eSEmmanuel Vadot  - '#interrupt-cells'
48*ae5de77eSEmmanuel Vadot  - reg
49*ae5de77eSEmmanuel Vadot  - clear-mask
50*ae5de77eSEmmanuel Vadot  - valid-mask
51*ae5de77eSEmmanuel Vadot
52*ae5de77eSEmmanuel Vadotexamples:
53*ae5de77eSEmmanuel Vadot  - |
54*ae5de77eSEmmanuel Vadot    interrupt-controller@14000000 {
55*ae5de77eSEmmanuel Vadot        compatible = "arm,versatile-fpga-irq";
56*ae5de77eSEmmanuel Vadot        #interrupt-cells = <1>;
57*ae5de77eSEmmanuel Vadot        interrupt-controller;
58*ae5de77eSEmmanuel Vadot        reg = <0x14000000 0x100>;
59*ae5de77eSEmmanuel Vadot        clear-mask = <0xffffffff>;
60*ae5de77eSEmmanuel Vadot        valid-mask = <0x003fffff>;
61*ae5de77eSEmmanuel Vadot    };
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