1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interconnect/qcom,rpm.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm RPM Network-On-Chip Interconnect 8 9maintainers: 10 - Georgi Djakov <georgi.djakov@linaro.org> 11 12description: | 13 RPM interconnect providers support system bandwidth requirements through 14 RPM processor. The provider is able to communicate with the RPM through 15 the RPM shared memory device. 16 17properties: 18 reg: 19 maxItems: 1 20 21 compatible: 22 enum: 23 - qcom,msm8916-bimc 24 - qcom,msm8916-pcnoc 25 - qcom,msm8916-snoc 26 - qcom,msm8939-bimc 27 - qcom,msm8939-pcnoc 28 - qcom,msm8939-snoc 29 - qcom,msm8939-snoc-mm 30 - qcom,qcs404-bimc 31 - qcom,qcs404-pcnoc 32 - qcom,qcs404-snoc 33 34 '#interconnect-cells': 35 const: 1 36 37 clock-names: 38 items: 39 - const: bus 40 - const: bus_a 41 42 clocks: 43 items: 44 - description: Bus Clock 45 - description: Bus A Clock 46 47required: 48 - compatible 49 - reg 50 - '#interconnect-cells' 51 - clock-names 52 - clocks 53 54additionalProperties: false 55 56examples: 57 - | 58 #include <dt-bindings/clock/qcom,rpmcc.h> 59 60 bimc: interconnect@400000 { 61 compatible = "qcom,msm8916-bimc"; 62 reg = <0x00400000 0x62000>; 63 #interconnect-cells = <1>; 64 clock-names = "bus", "bus_a"; 65 clocks = <&rpmcc RPM_SMD_BIMC_CLK>, 66 <&rpmcc RPM_SMD_BIMC_A_CLK>; 67 }; 68 69 pcnoc: interconnect@500000 { 70 compatible = "qcom,msm8916-pcnoc"; 71 reg = <0x00500000 0x11000>; 72 #interconnect-cells = <1>; 73 clock-names = "bus", "bus_a"; 74 clocks = <&rpmcc RPM_SMD_PCNOC_CLK>, 75 <&rpmcc RPM_SMD_PCNOC_A_CLK>; 76 }; 77 78 snoc: interconnect@580000 { 79 compatible = "qcom,msm8916-snoc"; 80 reg = <0x00580000 0x14000>; 81 #interconnect-cells = <1>; 82 clock-names = "bus", "bus_a"; 83 clocks = <&rpmcc RPM_SMD_SNOC_CLK>, 84 <&rpmcc RPM_SMD_SNOC_A_CLK>; 85 }; 86