xref: /freebsd/sys/contrib/device-tree/Bindings/interconnect/qcom,msm8998-bwmon.yaml (revision 8bab661a3316d8bd9b9fbd11a3b4371b91507bd2) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Interconnect Bandwidth Monitor
8
9maintainers:
10  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11
12description: |
13  Bandwidth Monitor measures current throughput on buses between various NoC
14  fabrics and provides information when it crosses configured thresholds.
15
16  Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845::
17   - Measuring the bandwidth between CPUs and Last Level Cache Controller -
18     called just BWMON,
19   - Measuring the bandwidth between Last Level Cache Controller and memory
20     (DDR) - called LLCC BWMON.
21
22properties:
23  compatible:
24    oneOf:
25      - items:
26          - enum:
27              - qcom,sc7280-cpu-bwmon
28              - qcom,sc8280xp-cpu-bwmon
29              - qcom,sdm845-bwmon
30          - const: qcom,msm8998-bwmon
31      - const: qcom,msm8998-bwmon       # BWMON v4
32      - items:
33          - enum:
34              - qcom,sc8280xp-llcc-bwmon
35          - const: qcom,sc7280-llcc-bwmon
36      - const: qcom,sc7280-llcc-bwmon   # BWMON v5
37      - const: qcom,sdm845-llcc-bwmon   # BWMON v5
38
39  interconnects:
40    maxItems: 1
41
42  interrupts:
43    maxItems: 1
44
45  operating-points-v2: true
46  opp-table:
47    type: object
48
49  reg:
50    # BWMON v4 (currently described) and BWMON v5 use one register address
51    # space.  BWMON v2 uses two register spaces - not yet described.
52    maxItems: 1
53
54required:
55  - compatible
56  - interconnects
57  - interrupts
58  - operating-points-v2
59  - opp-table
60  - reg
61
62additionalProperties: false
63
64examples:
65  - |
66    #include <dt-bindings/interconnect/qcom,sdm845.h>
67    #include <dt-bindings/interrupt-controller/arm-gic.h>
68
69    pmu@1436400 {
70        compatible = "qcom,sdm845-bwmon", "qcom,msm8998-bwmon";
71        reg = <0x01436400 0x600>;
72        interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
73        interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;
74
75        operating-points-v2 = <&cpu_bwmon_opp_table>;
76
77        cpu_bwmon_opp_table: opp-table {
78            compatible = "operating-points-v2";
79            opp-0 {
80                opp-peak-kBps = <4800000>;
81            };
82            opp-1 {
83                opp-peak-kBps = <9216000>;
84            };
85            opp-2 {
86                opp-peak-kBps = <15052800>;
87            };
88            opp-3 {
89                opp-peak-kBps = <20889600>;
90            };
91            opp-4 {
92                opp-peak-kBps = <25497600>;
93            };
94        };
95    };
96