1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interconnect/qcom,rpmh.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm RPMh Network-On-Chip Interconnect 8 9maintainers: 10 - Georgi Djakov <georgi.djakov@linaro.org> 11 - Odelu Kukatla <okukatla@codeaurora.org> 12 13description: | 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 16 able to communicate with the BCM through the Resource State Coordinator (RSC) 17 associated with each execution environment. Provider nodes must point to at 18 least one RPMh device child node pertaining to their RSC and each provider 19 can map to multiple RPMh resources. 20 21properties: 22 reg: 23 maxItems: 1 24 25 compatible: 26 enum: 27 - qcom,sc7180-aggre1-noc 28 - qcom,sc7180-aggre2-noc 29 - qcom,sc7180-camnoc-virt 30 - qcom,sc7180-compute-noc 31 - qcom,sc7180-config-noc 32 - qcom,sc7180-dc-noc 33 - qcom,sc7180-gem-noc 34 - qcom,sc7180-ipa-virt 35 - qcom,sc7180-mc-virt 36 - qcom,sc7180-mmss-noc 37 - qcom,sc7180-npu-noc 38 - qcom,sc7180-qup-virt 39 - qcom,sc7180-system-noc 40 - qcom,sdm845-aggre1-noc 41 - qcom,sdm845-aggre2-noc 42 - qcom,sdm845-config-noc 43 - qcom,sdm845-dc-noc 44 - qcom,sdm845-gladiator-noc 45 - qcom,sdm845-mem-noc 46 - qcom,sdm845-mmss-noc 47 - qcom,sdm845-system-noc 48 - qcom,sdx55-ipa-virt 49 - qcom,sdx55-mc-virt 50 - qcom,sdx55-mem-noc 51 - qcom,sdx55-system-noc 52 - qcom,sm8150-aggre1-noc 53 - qcom,sm8150-aggre2-noc 54 - qcom,sm8150-camnoc-noc 55 - qcom,sm8150-compute-noc 56 - qcom,sm8150-config-noc 57 - qcom,sm8150-dc-noc 58 - qcom,sm8150-gem-noc 59 - qcom,sm8150-ipa-virt 60 - qcom,sm8150-mc-virt 61 - qcom,sm8150-mmss-noc 62 - qcom,sm8150-system-noc 63 - qcom,sm8250-aggre1-noc 64 - qcom,sm8250-aggre2-noc 65 - qcom,sm8250-compute-noc 66 - qcom,sm8250-config-noc 67 - qcom,sm8250-dc-noc 68 - qcom,sm8250-gem-noc 69 - qcom,sm8250-ipa-virt 70 - qcom,sm8250-mc-virt 71 - qcom,sm8250-mmss-noc 72 - qcom,sm8250-npu-noc 73 - qcom,sm8250-system-noc 74 - qcom,sm8350-aggre1-noc 75 - qcom,sm8350-aggre2-noc 76 - qcom,sm8350-config-noc 77 - qcom,sm8350-dc-noc 78 - qcom,sm8350-gem-noc 79 - qcom,sm8350-lpass-ag-noc 80 - qcom,sm8350-mc-virt 81 - qcom,sm8350-mmss-noc 82 - qcom,sm8350-compute-noc 83 - qcom,sm8350-system-noc 84 85 '#interconnect-cells': 86 enum: [ 1, 2 ] 87 88 qcom,bcm-voters: 89 $ref: /schemas/types.yaml#/definitions/phandle-array 90 description: | 91 List of phandles to qcom,bcm-voter nodes that are required by 92 this interconnect to send RPMh commands. 93 94 qcom,bcm-voter-names: 95 description: | 96 Names for each of the qcom,bcm-voters specified. 97 98required: 99 - compatible 100 - reg 101 - '#interconnect-cells' 102 - qcom,bcm-voters 103 104additionalProperties: false 105 106examples: 107 - | 108 #include <dt-bindings/interconnect/qcom,sdm845.h> 109 110 mem_noc: interconnect@1380000 { 111 compatible = "qcom,sdm845-mem-noc"; 112 reg = <0x01380000 0x27200>; 113 #interconnect-cells = <1>; 114 qcom,bcm-voters = <&apps_bcm_voter>; 115 }; 116 117 mmss_noc: interconnect@1740000 { 118 compatible = "qcom,sdm845-mmss-noc"; 119 reg = <0x01740000 0x1c1000>; 120 #interconnect-cells = <1>; 121 qcom,bcm-voter-names = "apps", "disp"; 122 qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>; 123 }; 124