xref: /freebsd/sys/contrib/device-tree/Bindings/iio/adc/ti,adc12138.yaml (revision fe75646a0234a261c0013bf1840fdac4acaf0cec) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/ti,adc12138.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Texas Instruments ADC12138 and similar self-calibrating ADCs
8
9maintainers:
10  - Akinobu Mita <akinobu.mita@gmail.com>
11
12description: |
13  13 bit ADCs with 1, 2 or 8 inputs and self calibrating circuitry to
14  correct for linearity, zero and full scale errors.
15
16properties:
17  compatible:
18    enum:
19      - ti,adc12130
20      - ti,adc12132
21      - ti,adc12138
22
23  reg:
24    maxItems: 1
25
26  interrupts:
27    maxItems: 1
28    description: End of Conversion (EOC) interrupt
29
30  clocks:
31    maxItems: 1
32    description: Conversion clock input.
33
34  vref-p-supply:
35    description: The regulator supply for positive analog voltage reference
36
37  vref-n-supply:
38    description: |
39      The regulator supply for negative analog voltage reference
40      (Note that this must not go below GND or exceed vref-p)
41      If not specified, this is assumed to be analog ground.
42
43  ti,acquisition-time:
44    $ref: /schemas/types.yaml#/definitions/uint32
45    enum: [ 6, 10, 18, 34 ]
46    description: |
47      The number of conversion clock periods for the S/H's acquisition time.
48      For high source impedances, this value can be increased to 18 or 34.
49      For less ADC accuracy and/or slower CCLK frequencies this value may be
50      decreased to 6.  See section 6.0 INPUT SOURCE RESISTANCE in the
51      datasheet for details.
52
53  "#io-channel-cells":
54    const: 1
55
56required:
57  - compatible
58  - reg
59  - interrupts
60  - clocks
61  - vref-p-supply
62
63allOf:
64  - $ref: /schemas/spi/spi-peripheral-props.yaml#
65
66unevaluatedProperties: false
67
68examples:
69  - |
70    #include <dt-bindings/interrupt-controller/irq.h>
71    spi {
72        #address-cells = <1>;
73        #size-cells = <0>;
74
75        adc@0 {
76            compatible = "ti,adc12138";
77            reg = <0>;
78            interrupts = <28 IRQ_TYPE_EDGE_RISING>;
79            interrupt-parent = <&gpio1>;
80            clocks = <&cclk>;
81            vref-p-supply = <&ldo4_reg>;
82            spi-max-frequency = <5000000>;
83            ti,acquisition-time = <6>;
84            #io-channel-cells = <1>;
85        };
86    };
87...
88