1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx) 8 9maintainers: 10 - Zhiyong Tao <zhiyong.tao@mediatek.com> 11 - Matthias Brugger <matthias.bgg@gmail.com> 12 13description: | 14 The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found 15 in some Mediatek SoCs which among other things measures the temperatures 16 in the SoC. It can be used directly with register accesses, but it is also 17 used by thermal controller which reads the temperatures from the AUXADC 18 directly via its own bus interface. See mediatek-thermal bindings 19 for the Thermal Controller which holds a phandle to the AUXADC. 20 21properties: 22 compatible: 23 oneOf: 24 - enum: 25 - mediatek,mt2701-auxadc 26 - mediatek,mt2712-auxadc 27 - mediatek,mt6765-auxadc 28 - mediatek,mt7622-auxadc 29 - mediatek,mt8173-auxadc 30 - items: 31 - enum: 32 - mediatek,mt7623-auxadc 33 - const: mediatek,mt2701-auxadc 34 - items: 35 - enum: 36 - mediatek,mt8183-auxadc 37 - mediatek,mt8186-auxadc 38 - mediatek,mt8188-auxadc 39 - mediatek,mt8195-auxadc 40 - mediatek,mt8516-auxadc 41 - const: mediatek,mt8173-auxadc 42 43 reg: 44 maxItems: 1 45 46 clocks: 47 maxItems: 1 48 49 clock-names: 50 const: main 51 52 "#io-channel-cells": 53 const: 1 54 55additionalProperties: false 56 57required: 58 - compatible 59 - reg 60 - clocks 61 - clock-names 62 - "#io-channel-cells" 63 64examples: 65 - | 66 #include <dt-bindings/clock/mt8183-clk.h> 67 soc { 68 #address-cells = <2>; 69 #size-cells = <2>; 70 71 adc@11001000 { 72 compatible = "mediatek,mt8183-auxadc", 73 "mediatek,mt8173-auxadc"; 74 reg = <0 0x11001000 0 0x1000>; 75 clocks = <&infracfg CLK_INFRA_AUXADC>; 76 clock-names = "main"; 77 #io-channel-cells = <1>; 78 }; 79 }; 80... 81