xref: /freebsd/sys/contrib/device-tree/Bindings/i2c/snps,designware-i2c.yaml (revision cfd6422a5217410fbd66f7a7a8a64d9d85e61229) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare APB I2C Controller
8
9maintainers:
10  - Jarkko Nikula <jarkko.nikula@linux.intel.com>
11
12allOf:
13  - $ref: /schemas/i2c/i2c-controller.yaml#
14  - if:
15      properties:
16        compatible:
17          not:
18            contains:
19              const: mscc,ocelot-i2c
20    then:
21      properties:
22        reg:
23          maxItems: 1
24
25properties:
26  compatible:
27    oneOf:
28      - description: Generic Synopsys DesignWare I2C controller
29        const: snps,designware-i2c
30      - description: Microsemi Ocelot SoCs I2C controller
31        items:
32          - const: mscc,ocelot-i2c
33          - const: snps,designware-i2c
34      - description: Baikal-T1 SoC System I2C controller
35        const: baikal,bt1-sys-i2c
36
37  reg:
38    minItems: 1
39    items:
40      - description: DW APB I2C controller memory mapped registers
41      - description: |
42          ICPU_CFG:TWI_DELAY registers to setup the SDA hold time.
43          This registers are specific to the Ocelot I2C-controller.
44
45  interrupts:
46    maxItems: 1
47
48  clocks:
49    minItems: 1
50    items:
51      - description: I2C controller reference clock source
52      - description: APB interface clock source
53
54  clock-names:
55    minItems: 1
56    items:
57      - const: ref
58      - const: pclk
59
60  resets:
61    maxItems: 1
62
63  clock-frequency:
64    description: Desired I2C bus clock frequency in Hz
65    enum: [100000, 400000, 1000000, 3400000]
66    default: 400000
67
68  i2c-sda-hold-time-ns:
69    maxItems: 1
70    description: |
71      The property should contain the SDA hold time in nanoseconds. This option
72      is only supported in hardware blocks version 1.11a or newer or on
73      Microsemi SoCs.
74
75  i2c-scl-falling-time-ns:
76    maxItems: 1
77    description: |
78      The property should contain the SCL falling time in nanoseconds.
79      This value is used to compute the tLOW period.
80    default: 300
81
82  i2c-sda-falling-time-ns:
83    maxItems: 1
84    description: |
85      The property should contain the SDA falling time in nanoseconds.
86      This value is used to compute the tHIGH period.
87    default: 300
88
89  dmas:
90    items:
91      - description: TX DMA Channel
92      - description: RX DMA Channel
93
94  dma-names:
95    items:
96      - const: tx
97      - const: rx
98
99unevaluatedProperties: false
100
101required:
102  - compatible
103  - reg
104  - "#address-cells"
105  - "#size-cells"
106  - interrupts
107
108examples:
109  - |
110    i2c@f0000 {
111      compatible = "snps,designware-i2c";
112      reg = <0xf0000 0x1000>;
113      #address-cells = <1>;
114      #size-cells = <0>;
115      interrupts = <11>;
116      clock-frequency = <400000>;
117    };
118  - |
119    i2c@1120000 {
120      compatible = "snps,designware-i2c";
121      reg = <0x1120000 0x1000>;
122      #address-cells = <1>;
123      #size-cells = <0>;
124      interrupts = <12 1>;
125      clock-frequency = <400000>;
126      i2c-sda-hold-time-ns = <300>;
127      i2c-sda-falling-time-ns = <300>;
128      i2c-scl-falling-time-ns = <300>;
129    };
130  - |
131    i2c@2000 {
132      compatible = "snps,designware-i2c";
133      reg = <0x2000 0x100>;
134      #address-cells = <1>;
135      #size-cells = <0>;
136      clock-frequency = <400000>;
137      clocks = <&i2cclk>;
138      interrupts = <0>;
139
140      eeprom@64 {
141        compatible = "atmel,24c02";
142        reg = <0x64>;
143      };
144    };
145  - |
146    i2c@100400 {
147      compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
148      reg = <0x100400 0x100>, <0x198 0x8>;
149      pinctrl-0 = <&i2c_pins>;
150      pinctrl-names = "default";
151      #address-cells = <1>;
152      #size-cells = <0>;
153      interrupts = <8>;
154      clocks = <&ahb_clk>;
155    };
156...
157