xref: /freebsd/sys/contrib/device-tree/Bindings/i2c/renesas,riic.yaml (revision d5b0e70f7e04d971691517ce1304d86a1e367e2e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/renesas,riic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas RZ/A and RZ/G2L I2C Bus Interface (RIIC)
8
9maintainers:
10  - Chris Brandt <chris.brandt@renesas.com>
11  - Wolfram Sang <wsa+renesas@sang-engineering.com>
12
13allOf:
14  - $ref: /schemas/i2c/i2c-controller.yaml#
15
16properties:
17  compatible:
18    items:
19      - enum:
20          - renesas,riic-r7s72100   # RZ/A1H
21          - renesas,riic-r7s9210    # RZ/A2M
22          - renesas,riic-r9a07g043  # RZ/G2UL
23          - renesas,riic-r9a07g044  # RZ/G2{L,LC}
24          - renesas,riic-r9a07g054  # RZ/V2L
25      - const: renesas,riic-rz      # RZ/A or RZ/G2L
26
27  reg:
28    maxItems: 1
29
30  interrupts:
31    items:
32      - description: Transmit End Interrupt
33      - description: Receive Data Full Interrupt
34      - description: Transmit Data Empty Interrupt
35      - description: Stop Condition Detection Interrupt
36      - description: Start Condition Detection Interrupt
37      - description: NACK Reception Interrupt
38      - description: Arbitration-Lost Interrupt
39      - description: Timeout Interrupt
40
41  interrupt-names:
42    items:
43      - const: tei
44      - const: ri
45      - const: ti
46      - const: spi
47      - const: sti
48      - const: naki
49      - const: ali
50      - const: tmoi
51
52  clock-frequency:
53    description:
54      Desired I2C bus clock frequency in Hz. The absence of this property
55      indicates the default frequency 100 kHz.
56
57  clocks:
58    maxItems: 1
59
60  power-domains:
61    maxItems: 1
62
63required:
64  - compatible
65  - reg
66  - interrupts
67  - interrupt-names
68  - clocks
69  - clock-frequency
70  - power-domains
71  - '#address-cells'
72  - '#size-cells'
73
74if:
75  properties:
76    compatible:
77      contains:
78        enum:
79          - renesas,riic-r9a07g043
80          - renesas,riic-r9a07g044
81          - renesas,riic-r9a07g054
82then:
83  required:
84    - resets
85
86unevaluatedProperties: false
87
88examples:
89  - |
90    #include <dt-bindings/clock/r7s72100-clock.h>
91    #include <dt-bindings/interrupt-controller/arm-gic.h>
92
93    i2c0: i2c@fcfee000 {
94            compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
95            reg = <0xfcfee000 0x44>;
96            interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
97                         <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
98                         <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
99                         <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
100                         <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
101                         <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
102                         <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
103                         <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
104            interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali",
105                              "tmoi";
106            clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
107            clock-frequency = <100000>;
108            power-domains = <&cpg_clocks>;
109            #address-cells = <1>;
110            #size-cells = <0>;
111    };
112