xref: /freebsd/sys/contrib/device-tree/Bindings/i2c/i2c-mt65xx.txt (revision f81cdf24ba5436367377f7c8e8f51f6df2a75ca7)
1* MediaTek's I2C controller
2
3The MediaTek's I2C controller is used to interface with I2C devices.
4
5Required properties:
6  - compatible: value should be either of the following.
7      "mediatek,mt2701-i2c", "mediatek,mt6577-i2c": for MediaTek MT2701
8      "mediatek,mt2712-i2c": for MediaTek MT2712
9      "mediatek,mt6577-i2c": for MediaTek MT6577
10      "mediatek,mt6589-i2c": for MediaTek MT6589
11      "mediatek,mt6797-i2c", "mediatek,mt6577-i2c": for MediaTek MT6797
12      "mediatek,mt7622-i2c": for MediaTek MT7622
13      "mediatek,mt7623-i2c", "mediatek,mt6577-i2c": for MediaTek MT7623
14      "mediatek,mt7629-i2c", "mediatek,mt2712-i2c": for MediaTek MT7629
15      "mediatek,mt8168-i2c": for MediaTek MT8168
16      "mediatek,mt8173-i2c": for MediaTek MT8173
17      "mediatek,mt8183-i2c": for MediaTek MT8183
18      "mediatek,mt8186-i2c": for MediaTek MT8186
19      "mediatek,mt8192-i2c": for MediaTek MT8192
20      "mediatek,mt8195-i2c", "mediatek,mt8192-i2c": for MediaTek MT8195
21      "mediatek,mt8516-i2c", "mediatek,mt2712-i2c": for MediaTek MT8516
22  - reg: physical base address of the controller and dma base, length of memory
23    mapped region.
24  - interrupts: interrupt number to the cpu.
25  - clock-div: the fixed value for frequency divider of clock source in i2c
26    module. Each IC may be different.
27  - clocks: clock name from clock manager
28  - clock-names: Must include "main" and "dma", "arb" is for multi-master that
29    one bus has more than two i2c controllers, if enable have-pmic need include
30    "pmic" extra.
31
32Optional properties:
33  - clock-frequency: Frequency in Hz of the bus when transfer, the default value
34    is 100000.
35  - mediatek,have-pmic: platform can control i2c form special pmic side.
36    Only mt6589 and mt8135 support this feature.
37  - mediatek,use-push-pull: IO config use push-pull mode.
38  - vbus-supply: phandle to the regulator that provides power to SCL/SDA.
39
40Example:
41
42	i2c0: i2c@1100d000 {
43			compatible = "mediatek,mt6577-i2c";
44			reg = <0x1100d000 0x70>,
45			      <0x11000300 0x80>;
46			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
47			clock-frequency = <400000>;
48			mediatek,have-pmic;
49			clock-div = <16>;
50			clocks = <&i2c0_ck>, <&ap_dma_ck>;
51			clock-names = "main", "dma";
52	};
53
54