xref: /freebsd/sys/contrib/device-tree/Bindings/i2c/i2c-mpc.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel Vadot* I2C
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotRequired properties :
4*c66ec88fSEmmanuel Vadot
5*c66ec88fSEmmanuel Vadot - reg : Offset and length of the register set for the device
6*c66ec88fSEmmanuel Vadot - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a
7*c66ec88fSEmmanuel Vadot   compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
8*c66ec88fSEmmanuel Vadot   mpc5200 or mpc5200b. For the mpc5121, an additional node
9*c66ec88fSEmmanuel Vadot   "fsl,mpc5121-i2c-ctrl" is required as shown in the example below.
10*c66ec88fSEmmanuel Vadot
11*c66ec88fSEmmanuel VadotRecommended properties :
12*c66ec88fSEmmanuel Vadot
13*c66ec88fSEmmanuel Vadot - interrupts : <a b> where a is the interrupt number and b is a
14*c66ec88fSEmmanuel Vadot   field that represents an encoding of the sense and level
15*c66ec88fSEmmanuel Vadot   information for the interrupt.  This should be encoded based on
16*c66ec88fSEmmanuel Vadot   the information in section 2) depending on the type of interrupt
17*c66ec88fSEmmanuel Vadot   controller you have.
18*c66ec88fSEmmanuel Vadot - fsl,preserve-clocking : boolean; if defined, the clock settings
19*c66ec88fSEmmanuel Vadot   from the bootloader are preserved (not touched).
20*c66ec88fSEmmanuel Vadot - clock-frequency : desired I2C bus clock frequency in Hz.
21*c66ec88fSEmmanuel Vadot - fsl,timeout : I2C bus timeout in microseconds.
22*c66ec88fSEmmanuel Vadot
23*c66ec88fSEmmanuel VadotExamples :
24*c66ec88fSEmmanuel Vadot
25*c66ec88fSEmmanuel Vadot	/* MPC5121 based board */
26*c66ec88fSEmmanuel Vadot	i2c@1740 {
27*c66ec88fSEmmanuel Vadot		#address-cells = <1>;
28*c66ec88fSEmmanuel Vadot		#size-cells = <0>;
29*c66ec88fSEmmanuel Vadot		compatible = "fsl,mpc5121-i2c", "fsl-i2c";
30*c66ec88fSEmmanuel Vadot		reg = <0x1740 0x20>;
31*c66ec88fSEmmanuel Vadot		interrupts = <11 0x8>;
32*c66ec88fSEmmanuel Vadot		interrupt-parent = <&ipic>;
33*c66ec88fSEmmanuel Vadot		clock-frequency = <100000>;
34*c66ec88fSEmmanuel Vadot	};
35*c66ec88fSEmmanuel Vadot
36*c66ec88fSEmmanuel Vadot	i2ccontrol@1760 {
37*c66ec88fSEmmanuel Vadot		compatible = "fsl,mpc5121-i2c-ctrl";
38*c66ec88fSEmmanuel Vadot		reg = <0x1760 0x8>;
39*c66ec88fSEmmanuel Vadot	};
40*c66ec88fSEmmanuel Vadot
41*c66ec88fSEmmanuel Vadot	/* MPC5200B based board */
42*c66ec88fSEmmanuel Vadot	i2c@3d00 {
43*c66ec88fSEmmanuel Vadot		#address-cells = <1>;
44*c66ec88fSEmmanuel Vadot		#size-cells = <0>;
45*c66ec88fSEmmanuel Vadot		compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
46*c66ec88fSEmmanuel Vadot		reg = <0x3d00 0x40>;
47*c66ec88fSEmmanuel Vadot		interrupts = <2 15 0>;
48*c66ec88fSEmmanuel Vadot		interrupt-parent = <&mpc5200_pic>;
49*c66ec88fSEmmanuel Vadot		fsl,preserve-clocking;
50*c66ec88fSEmmanuel Vadot	};
51*c66ec88fSEmmanuel Vadot
52*c66ec88fSEmmanuel Vadot	/* MPC8544 base board */
53*c66ec88fSEmmanuel Vadot	i2c@3100 {
54*c66ec88fSEmmanuel Vadot		#address-cells = <1>;
55*c66ec88fSEmmanuel Vadot		#size-cells = <0>;
56*c66ec88fSEmmanuel Vadot		compatible = "fsl,mpc8544-i2c", "fsl-i2c";
57*c66ec88fSEmmanuel Vadot		reg = <0x3100 0x100>;
58*c66ec88fSEmmanuel Vadot		interrupts = <43 2>;
59*c66ec88fSEmmanuel Vadot		interrupt-parent = <&mpic>;
60*c66ec88fSEmmanuel Vadot		clock-frequency = <400000>;
61*c66ec88fSEmmanuel Vadot		fsl,timeout = <10000>;
62*c66ec88fSEmmanuel Vadot	};
63