xref: /freebsd/sys/contrib/device-tree/Bindings/i2c/i2c-exynos5.yaml (revision e32fecd0c2c3ee37c47ee100f169e7eb0282a873) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung's High Speed I2C controller
8
9maintainers:
10  - Krzysztof Kozlowski <krzk@kernel.org>
11
12description: |
13  The Samsung's High Speed I2C controller is used to interface with I2C devices
14  at various speeds ranging from 100kHz to 3.4MHz.
15
16  In case the HSI2C controller is encapsulated within USI block (it's the case
17  e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to
18  define USI node in device tree file, choosing "i2c" configuration. Please see
19  Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
20
21properties:
22  compatible:
23    oneOf:
24      - enum:
25          - samsung,exynos5250-hsi2c    # Exynos5250 and Exynos5420
26          - samsung,exynos5260-hsi2c    # Exynos5260
27          - samsung,exynos7-hsi2c       # Exynos7
28          - samsung,exynosautov9-hsi2c  # ExynosAutoV9 and Exynos850
29      - const: samsung,exynos5-hsi2c    # Exynos5250 and Exynos5420
30        deprecated: true
31
32  reg:
33    maxItems: 1
34
35  interrupts:
36    maxItems: 1
37
38  clock-frequency:
39    default: 100000
40    description:
41      Desired operating frequency in Hz of the bus.
42
43      If not specified, the bus operates in fast-speed mode at 100kHz.
44
45      If specified, the bus operates in high-speed mode only if the
46      clock-frequency is >= 1MHz.
47
48  clocks:
49    minItems: 1
50    items:
51      - description: I2C operating clock
52      - description: Bus clock (APB)
53
54  clock-names:
55    minItems: 1
56    items:
57      - const: hsi2c
58      - const: hsi2c_pclk
59
60required:
61  - compatible
62  - reg
63  - interrupts
64  - clocks
65
66allOf:
67  - $ref: /schemas/i2c/i2c-controller.yaml#
68  - if:
69      properties:
70        compatible:
71          contains:
72            enum:
73              - samsung,exynosautov9-hsi2c
74
75    then:
76      properties:
77        clocks:
78          minItems: 2
79
80        clock-names:
81          minItems: 2
82
83      required:
84        - clock-names
85
86    else:
87      properties:
88        clocks:
89          maxItems: 1
90
91unevaluatedProperties: false
92
93examples:
94  - |
95    #include <dt-bindings/clock/exynos5420.h>
96    #include <dt-bindings/interrupt-controller/arm-gic.h>
97    #include <dt-bindings/interrupt-controller/irq.h>
98
99    hsi2c_8: i2c@12e00000 {
100        compatible = "samsung,exynos5250-hsi2c";
101        reg = <0x12e00000 0x1000>;
102        interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
103        #address-cells = <1>;
104        #size-cells = <0>;
105        clock-frequency = <100000>;
106        clocks = <&clock CLK_USI4>;
107        clock-names = "hsi2c";
108
109        pmic@66 {
110            /* compatible = "samsung,s2mps11-pmic"; */
111            reg = <0x66>;
112        };
113    };
114
115  - |
116    #include <dt-bindings/clock/exynos850.h>
117    #include <dt-bindings/interrupt-controller/arm-gic.h>
118
119    hsi2c_2: i2c@138c0000 {
120        compatible = "samsung,exynosautov9-hsi2c";
121        reg = <0x138c0000 0xc0>;
122        interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
123        #address-cells = <1>;
124        #size-cells = <0>;
125        clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>,
126                 <&cmu_peri CLK_GOUT_HSI2C2_PCLK>;
127        clock-names = "hsi2c", "hsi2c_pclk";
128
129        pmic@66 {
130            /* compatible = "samsung,s2mps11-pmic"; */
131            reg = <0x66>;
132        };
133    };
134