xref: /freebsd/sys/contrib/device-tree/Bindings/gpio/socionext,uniphier-gpio.yaml (revision 2eb4d8dc723da3cf7d735a3226ae49da4c8c5dbc) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpio/socionext,uniphier-gpio.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: UniPhier GPIO controller
8
9maintainers:
10  - Masahiro Yamada <yamada.masahiro@socionext.com>
11
12properties:
13  $nodename:
14    pattern: "^gpio@[0-9a-f]+$"
15
16  compatible:
17    const: socionext,uniphier-gpio
18
19  reg:
20    maxItems: 1
21
22  gpio-controller: true
23
24  "#gpio-cells":
25    const: 2
26
27  interrupt-controller: true
28
29  "#interrupt-cells":
30    description: |
31      The first cell defines the interrupt number.
32      The second cell bits[3:0] is used to specify trigger type as follows:
33        1 = low-to-high edge triggered
34        2 = high-to-low edge triggered
35        4 = active high level-sensitive
36        8 = active low level-sensitive
37      Valid combinations are 1, 2, 3, 4, 8.
38    const: 2
39
40  ngpios:
41    minimum: 0
42    maximum: 512
43
44  gpio-ranges: true
45
46  gpio-ranges-group-names: true
47
48  socionext,interrupt-ranges:
49    description: |
50      Specifies an interrupt number mapping between this GPIO controller and
51      its interrupt parent, in the form of arbitrary number of
52      <child-interrupt-base parent-interrupt-base length> triplets.
53    $ref: /schemas/types.yaml#/definitions/uint32-matrix
54
55required:
56  - compatible
57  - reg
58  - gpio-controller
59  - "#gpio-cells"
60  - interrupt-controller
61  - "#interrupt-cells"
62  - ngpios
63  - gpio-ranges
64  - socionext,interrupt-ranges
65
66additionalProperties: false
67
68examples:
69  - |
70    #include <dt-bindings/gpio/gpio.h>
71    #include <dt-bindings/gpio/uniphier-gpio.h>
72
73    gpio: gpio@55000000 {
74        compatible = "socionext,uniphier-gpio";
75        reg = <0x55000000 0x200>;
76        interrupt-parent = <&aidet>;
77        interrupt-controller;
78        #interrupt-cells = <2>;
79        gpio-controller;
80        #gpio-cells = <2>;
81        gpio-ranges = <&pinctrl 0 0 0>;
82        gpio-ranges-group-names = "gpio_range";
83        ngpios = <248>;
84        socionext,interrupt-ranges = <0 48 16>, <16 154 5>, <21 217 3>;
85    };
86
87    // Consumer:
88    // Please note UNIPHIER_GPIO_PORT(29, 4) represents PORT294 in the SoC
89    // document. Unfortunately, only the one's place is octal in the port
90    // numbering. (That is, PORT 8, 9, 18, 19, 28, 29, ... do not exist.)
91    // UNIPHIER_GPIO_PORT() is a helper macro to calculate 29 * 8 + 4.
92    sdhci0_pwrseq {
93        compatible = "mmc-pwrseq-emmc";
94        reset-gpios = <&gpio UNIPHIER_GPIO_PORT(29, 4) GPIO_ACTIVE_LOW>;
95    };
96