xref: /freebsd/sys/contrib/device-tree/Bindings/gpio/snps,dw-apb-gpio.yaml (revision aa1a8ff2d6dbc51ef058f46f3db5a8bb77967145) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare APB GPIO controller
8
9description: |
10  Synopsys DesignWare GPIO controllers have a configurable number of ports,
11  each of which are intended to be represented as child nodes with the generic
12  GPIO-controller properties as described in this bindings file.
13
14maintainers:
15  - Hoan Tran <hoan@os.amperecomputing.com>
16  - Serge Semin <fancer.lancer@gmail.com>
17
18properties:
19  $nodename:
20    pattern: "^gpio@[0-9a-f]+$"
21
22  compatible:
23    const: snps,dw-apb-gpio
24
25  "#address-cells":
26    const: 1
27
28  "#size-cells":
29    const: 0
30
31  reg:
32    maxItems: 1
33
34  clocks:
35    minItems: 1
36    items:
37      - description: APB interface clock source
38      - description: DW GPIO debounce reference clock source
39
40  clock-names:
41    minItems: 1
42    items:
43      - const: bus
44      - const: db
45
46  resets:
47    maxItems: 1
48
49patternProperties:
50  "^gpio-(port|controller)@[0-9a-f]+$":
51    type: object
52    properties:
53      compatible:
54        const: snps,dw-apb-gpio-port
55
56      reg:
57        maxItems: 1
58
59      gpio-controller: true
60
61      '#gpio-cells':
62        const: 2
63
64      gpio-line-names:
65        minItems: 1
66        maxItems: 32
67
68      ngpios:
69        default: 32
70        minimum: 1
71        maximum: 32
72
73      snps,nr-gpios:
74        description: The number of GPIO pins exported by the port.
75        deprecated: true
76        $ref: /schemas/types.yaml#/definitions/uint32
77        default: 32
78        minimum: 1
79        maximum: 32
80
81      interrupts:
82        description: |
83          The interrupts to the parent controller raised when GPIOs generate
84          the interrupts. If the controller provides one combined interrupt
85          for all GPIOs, specify a single interrupt. If the controller provides
86          one interrupt for each GPIO, provide a list of interrupts that
87          correspond to each of the GPIO pins.
88        minItems: 1
89        maxItems: 32
90
91      interrupt-controller: true
92
93      '#interrupt-cells':
94        const: 2
95
96    required:
97      - compatible
98      - reg
99      - gpio-controller
100      - '#gpio-cells'
101
102    dependencies:
103      interrupt-controller: [ interrupts ]
104
105    additionalProperties: false
106
107additionalProperties: false
108
109required:
110  - compatible
111  - reg
112  - "#address-cells"
113  - "#size-cells"
114
115examples:
116  - |
117    gpio: gpio@20000 {
118      compatible = "snps,dw-apb-gpio";
119      reg = <0x20000 0x1000>;
120      #address-cells = <1>;
121      #size-cells = <0>;
122
123      porta: gpio-port@0 {
124        compatible = "snps,dw-apb-gpio-port";
125        reg = <0>;
126        gpio-controller;
127        #gpio-cells = <2>;
128        snps,nr-gpios = <8>;
129        interrupt-controller;
130        #interrupt-cells = <2>;
131        interrupt-parent = <&vic1>;
132        interrupts = <0>;
133      };
134
135      portb: gpio-port@1 {
136        compatible = "snps,dw-apb-gpio-port";
137        reg = <1>;
138        gpio-controller;
139        #gpio-cells = <2>;
140        snps,nr-gpios = <8>;
141      };
142    };
143...
144