1*5def4c47SEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*5def4c47SEmmanuel Vadot%YAML 1.2 3*5def4c47SEmmanuel Vadot--- 4*5def4c47SEmmanuel Vadot$id: http://devicetree.org/schemas/gpio/mediatek,mt7621-gpio.yaml# 5*5def4c47SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*5def4c47SEmmanuel Vadot 7*5def4c47SEmmanuel Vadottitle: Mediatek MT7621 SoC GPIO controller 8*5def4c47SEmmanuel Vadot 9*5def4c47SEmmanuel Vadotmaintainers: 10*5def4c47SEmmanuel Vadot - Sergio Paracuellos <sergio.paracuellos@gmail.com> 11*5def4c47SEmmanuel Vadot 12*5def4c47SEmmanuel Vadotdescription: | 13*5def4c47SEmmanuel Vadot The IP core used inside these SoCs has 3 banks of 32 GPIOs each. 14*5def4c47SEmmanuel Vadot The registers of all the banks are interwoven inside one single IO range. 15*5def4c47SEmmanuel Vadot We load one GPIO controller instance per bank. Also the GPIO controller can receive 16*5def4c47SEmmanuel Vadot interrupts on any of the GPIOs, either edge or level. It then interrupts the CPU 17*5def4c47SEmmanuel Vadot using GIC INT12. 18*5def4c47SEmmanuel Vadot 19*5def4c47SEmmanuel Vadotproperties: 20*5def4c47SEmmanuel Vadot $nodename: 21*5def4c47SEmmanuel Vadot pattern: "^gpio@[0-9a-f]+$" 22*5def4c47SEmmanuel Vadot 23*5def4c47SEmmanuel Vadot compatible: 24*5def4c47SEmmanuel Vadot const: mediatek,mt7621-gpio 25*5def4c47SEmmanuel Vadot 26*5def4c47SEmmanuel Vadot reg: 27*5def4c47SEmmanuel Vadot maxItems: 1 28*5def4c47SEmmanuel Vadot 29*5def4c47SEmmanuel Vadot "#gpio-cells": 30*5def4c47SEmmanuel Vadot const: 2 31*5def4c47SEmmanuel Vadot 32*5def4c47SEmmanuel Vadot gpio-controller: true 33*5def4c47SEmmanuel Vadot gpio-ranges: true 34*5def4c47SEmmanuel Vadot 35*5def4c47SEmmanuel Vadot interrupt-controller: true 36*5def4c47SEmmanuel Vadot 37*5def4c47SEmmanuel Vadot "#interrupt-cells": 38*5def4c47SEmmanuel Vadot const: 2 39*5def4c47SEmmanuel Vadot 40*5def4c47SEmmanuel Vadot interrupts: 41*5def4c47SEmmanuel Vadot maxItems: 1 42*5def4c47SEmmanuel Vadot 43*5def4c47SEmmanuel Vadotrequired: 44*5def4c47SEmmanuel Vadot - compatible 45*5def4c47SEmmanuel Vadot - reg 46*5def4c47SEmmanuel Vadot - "#gpio-cells" 47*5def4c47SEmmanuel Vadot - gpio-controller 48*5def4c47SEmmanuel Vadot - gpio-ranges 49*5def4c47SEmmanuel Vadot - interrupt-controller 50*5def4c47SEmmanuel Vadot - "#interrupt-cells" 51*5def4c47SEmmanuel Vadot - interrupts 52*5def4c47SEmmanuel Vadot 53*5def4c47SEmmanuel VadotadditionalProperties: false 54*5def4c47SEmmanuel Vadot 55*5def4c47SEmmanuel Vadotexamples: 56*5def4c47SEmmanuel Vadot - | 57*5def4c47SEmmanuel Vadot #include <dt-bindings/gpio/gpio.h> 58*5def4c47SEmmanuel Vadot #include <dt-bindings/interrupt-controller/mips-gic.h> 59*5def4c47SEmmanuel Vadot 60*5def4c47SEmmanuel Vadot gpio@600 { 61*5def4c47SEmmanuel Vadot compatible = "mediatek,mt7621-gpio"; 62*5def4c47SEmmanuel Vadot reg = <0x600 0x100>; 63*5def4c47SEmmanuel Vadot #gpio-cells = <2>; 64*5def4c47SEmmanuel Vadot gpio-controller; 65*5def4c47SEmmanuel Vadot gpio-ranges = <&pinctrl 0 0 95>; 66*5def4c47SEmmanuel Vadot interrupt-controller; 67*5def4c47SEmmanuel Vadot #interrupt-cells = <2>; 68*5def4c47SEmmanuel Vadot interrupt-parent = <&gic>; 69*5def4c47SEmmanuel Vadot interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>; 70*5def4c47SEmmanuel Vadot }; 71*5def4c47SEmmanuel Vadot 72*5def4c47SEmmanuel Vadot... 73