1*c66ec88fSEmmanuel Vadot* IBM/AMCC/APM GPIO Controller for PowerPC 4XX series and compatible SoCs 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotAll GPIOs are pin-shared with other functions. DCRs control whether a 4*c66ec88fSEmmanuel Vadotparticular pin that has GPIO capabilities acts as a GPIO or is used for 5*c66ec88fSEmmanuel Vadotanother purpose. GPIO outputs are separately programmable to emulate 6*c66ec88fSEmmanuel Vadotan open-drain driver. 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel VadotRequired properties: 9*c66ec88fSEmmanuel Vadot - compatible: must be "ibm,ppc4xx-gpio" 10*c66ec88fSEmmanuel Vadot - reg: address and length of the register set for the device 11*c66ec88fSEmmanuel Vadot - #gpio-cells: must be set to 2. The first cell is the pin number 12*c66ec88fSEmmanuel Vadot and the second cell is used to specify the gpio polarity: 13*c66ec88fSEmmanuel Vadot 0 = active high 14*c66ec88fSEmmanuel Vadot 1 = active low 15*c66ec88fSEmmanuel Vadot - gpio-controller: marks the device node as a gpio controller. 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel VadotExample: 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel VadotGPIO0: gpio@ef600b00 { 20*c66ec88fSEmmanuel Vadot compatible = "ibm,ppc4xx-gpio"; 21*c66ec88fSEmmanuel Vadot reg = <0xef600b00 0x00000048>; 22*c66ec88fSEmmanuel Vadot #gpio-cells = <2>; 23*c66ec88fSEmmanuel Vadot gpio-controller; 24*c66ec88fSEmmanuel Vadot}; 25