1Davinci/Keystone GPIO controller bindings 2 3Required Properties: 4- compatible: should be "ti,dm6441-gpio": for Davinci da850 SoCs 5 "ti,keystone-gpio": for Keystone 2 66AK2H/K, 66AK2L, 6 66AK2E SoCs 7 "ti,k2g-gpio", "ti,keystone-gpio": for 66AK2G 8 "ti,am654-gpio", "ti,keystone-gpio": for TI K3 AM654 9 "ti,j721e-gpio", "ti,keystone-gpio": for J721E SoCs 10 11- reg: Physical base address of the controller and the size of memory mapped 12 registers. 13 14- gpio-controller : Marks the device node as a gpio controller. 15 16- #gpio-cells : Should be two. 17 - first cell is the pin number 18 - second cell is used to specify optional parameters (unused) 19 20- interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are 21 supported at a time. 22 23- ti,ngpio: The number of GPIO pins supported. 24 25- ti,davinci-gpio-unbanked: The number of GPIOs that have an individual interrupt 26 line to processor. 27 28- clocks: Should contain the device's input clock, and should be defined as per 29 the appropriate clock bindings consumer usage in, 30 31 Documentation/devicetree/bindings/clock/keystone-gate.txt 32 for 66AK2HK/66AK2L/66AK2E SoCs or, 33 34 Documentation/devicetree/bindings/clock/ti,sci-clk.txt 35 for 66AK2G SoCs 36 37- clock-names: Name should be "gpio"; 38 39Currently clock-names and clocks are needed for all keystone 2 platforms 40Davinci platforms do not have DT clocks as of now. 41 42The GPIO controller also acts as an interrupt controller. It uses the default 43two cells specifier as described in Documentation/devicetree/bindings/ 44interrupt-controller/interrupts.txt. 45 46Example: 47 48gpio: gpio@1e26000 { 49 compatible = "ti,dm6441-gpio"; 50 gpio-controller; 51 #gpio-cells = <2>; 52 reg = <0x226000 0x1000>; 53 interrupt-parent = <&intc>; 54 interrupts = <42 IRQ_TYPE_EDGE_BOTH 43 IRQ_TYPE_EDGE_BOTH 55 44 IRQ_TYPE_EDGE_BOTH 45 IRQ_TYPE_EDGE_BOTH 56 46 IRQ_TYPE_EDGE_BOTH 47 IRQ_TYPE_EDGE_BOTH 57 48 IRQ_TYPE_EDGE_BOTH 49 IRQ_TYPE_EDGE_BOTH 58 50 IRQ_TYPE_EDGE_BOTH>; 59 ti,ngpio = <144>; 60 ti,davinci-gpio-unbanked = <0>; 61 interrupt-controller; 62 #interrupt-cells = <2>; 63}; 64 65leds { 66 compatible = "gpio-leds"; 67 68 led1 { 69 label = "davinci:green:usr1"; 70 gpios = <&gpio 10 GPIO_ACTIVE_HIGH>; 71 ... 72 }; 73 74 led2 { 75 label = "davinci:red:debug1"; 76 gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; 77 ... 78 }; 79}; 80 81Example for 66AK2G: 82 83gpio0: gpio@2603000 { 84 compatible = "ti,k2g-gpio", "ti,keystone-gpio"; 85 reg = <0x02603000 0x100>; 86 gpio-controller; 87 #gpio-cells = <2>; 88 interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>, 89 <GIC_SPI 433 IRQ_TYPE_EDGE_RISING>, 90 <GIC_SPI 434 IRQ_TYPE_EDGE_RISING>, 91 <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>, 92 <GIC_SPI 436 IRQ_TYPE_EDGE_RISING>, 93 <GIC_SPI 437 IRQ_TYPE_EDGE_RISING>, 94 <GIC_SPI 438 IRQ_TYPE_EDGE_RISING>, 95 <GIC_SPI 439 IRQ_TYPE_EDGE_RISING>, 96 <GIC_SPI 440 IRQ_TYPE_EDGE_RISING>; 97 interrupt-controller; 98 #interrupt-cells = <2>; 99 ti,ngpio = <144>; 100 ti,davinci-gpio-unbanked = <0>; 101 clocks = <&k2g_clks 0x001b 0x0>; 102 clock-names = "gpio"; 103}; 104 105Example for 66AK2HK/66AK2L/66AK2E: 106 107gpio0: gpio@260bf00 { 108 compatible = "ti,keystone-gpio"; 109 reg = <0x0260bf00 0x100>; 110 gpio-controller; 111 #gpio-cells = <2>; 112 /* HW Interrupts mapped to GPIO pins */ 113 interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>, 114 <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>, 115 <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>, 116 <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>, 117 <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>, 118 <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>, 119 <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>, 120 <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>, 121 <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>, 122 <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>, 123 <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>, 124 <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>, 125 <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>, 126 <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>, 127 <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>, 128 <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>, 129 <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>, 130 <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>, 131 <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>, 132 <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>, 133 <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>, 134 <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>, 135 <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>, 136 <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>, 137 <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>, 138 <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>, 139 <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>, 140 <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>, 141 <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>, 142 <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>, 143 <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>, 144 <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; 145 clocks = <&clkgpio>; 146 clock-names = "gpio"; 147 ti,ngpio = <32>; 148 ti,davinci-gpio-unbanked = <32>; 149}; 150 151Example for K3 AM654: 152 153wkup_gpio0: wkup_gpio0@42110000 { 154 compatible = "ti,am654-gpio", "ti,keystone-gpio"; 155 reg = <0x42110000 0x100>; 156 gpio-controller; 157 #gpio-cells = <2>; 158 interrupt-parent = <&intr_wkup_gpio>; 159 interrupts = <59 128>, <59 129>, <59 130>, <59 131>; 160 interrupt-controller; 161 #interrupt-cells = <2>; 162 ti,ngpio = <56>; 163 ti,davinci-gpio-unbanked = <0>; 164 clocks = <&k3_clks 59 0>; 165 clock-names = "gpio"; 166}; 167