1Davinci/Keystone GPIO controller bindings 2 3Required Properties: 4- compatible: should be "ti,dm6441-gpio": for Davinci da850 SoCs 5 "ti,keystone-gpio": for Keystone 2 66AK2H/K, 66AK2L, 6 66AK2E SoCs 7 "ti,k2g-gpio", "ti,keystone-gpio": for 66AK2G 8 "ti,am654-gpio", "ti,keystone-gpio": for TI K3 AM654 9 "ti,j721e-gpio", "ti,keystone-gpio": for J721E SoCs 10 "ti,am64-gpio", "ti,keystone-gpio": for AM64 SoCs 11 12- reg: Physical base address of the controller and the size of memory mapped 13 registers. 14 15- gpio-controller : Marks the device node as a gpio controller. 16 17- #gpio-cells : Should be two. 18 - first cell is the pin number 19 - second cell is used to specify optional parameters (unused) 20 21- interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are 22 supported at a time. 23 24- ti,ngpio: The number of GPIO pins supported. 25 26- ti,davinci-gpio-unbanked: The number of GPIOs that have an individual interrupt 27 line to processor. 28 29- clocks: Should contain the device's input clock, and should be defined as per 30 the appropriate clock bindings consumer usage in, 31 32 Documentation/devicetree/bindings/clock/keystone-gate.txt 33 for 66AK2HK/66AK2L/66AK2E SoCs or, 34 35 Documentation/devicetree/bindings/clock/ti,sci-clk.txt 36 for 66AK2G SoCs 37 38- clock-names: Name should be "gpio"; 39 40Currently clock-names and clocks are needed for all keystone 2 platforms 41Davinci platforms do not have DT clocks as of now. 42 43The GPIO controller also acts as an interrupt controller. It uses the default 44two cells specifier as described in Documentation/devicetree/bindings/ 45interrupt-controller/interrupts.txt. 46 47Example: 48 49gpio: gpio@1e26000 { 50 compatible = "ti,dm6441-gpio"; 51 gpio-controller; 52 #gpio-cells = <2>; 53 reg = <0x226000 0x1000>; 54 interrupt-parent = <&intc>; 55 interrupts = <42 IRQ_TYPE_EDGE_BOTH 43 IRQ_TYPE_EDGE_BOTH 56 44 IRQ_TYPE_EDGE_BOTH 45 IRQ_TYPE_EDGE_BOTH 57 46 IRQ_TYPE_EDGE_BOTH 47 IRQ_TYPE_EDGE_BOTH 58 48 IRQ_TYPE_EDGE_BOTH 49 IRQ_TYPE_EDGE_BOTH 59 50 IRQ_TYPE_EDGE_BOTH>; 60 ti,ngpio = <144>; 61 ti,davinci-gpio-unbanked = <0>; 62 interrupt-controller; 63 #interrupt-cells = <2>; 64}; 65 66leds { 67 compatible = "gpio-leds"; 68 69 led1 { 70 label = "davinci:green:usr1"; 71 gpios = <&gpio 10 GPIO_ACTIVE_HIGH>; 72 ... 73 }; 74 75 led2 { 76 label = "davinci:red:debug1"; 77 gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; 78 ... 79 }; 80}; 81 82Example for 66AK2G: 83 84gpio0: gpio@2603000 { 85 compatible = "ti,k2g-gpio", "ti,keystone-gpio"; 86 reg = <0x02603000 0x100>; 87 gpio-controller; 88 #gpio-cells = <2>; 89 interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>, 90 <GIC_SPI 433 IRQ_TYPE_EDGE_RISING>, 91 <GIC_SPI 434 IRQ_TYPE_EDGE_RISING>, 92 <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>, 93 <GIC_SPI 436 IRQ_TYPE_EDGE_RISING>, 94 <GIC_SPI 437 IRQ_TYPE_EDGE_RISING>, 95 <GIC_SPI 438 IRQ_TYPE_EDGE_RISING>, 96 <GIC_SPI 439 IRQ_TYPE_EDGE_RISING>, 97 <GIC_SPI 440 IRQ_TYPE_EDGE_RISING>; 98 interrupt-controller; 99 #interrupt-cells = <2>; 100 ti,ngpio = <144>; 101 ti,davinci-gpio-unbanked = <0>; 102 clocks = <&k2g_clks 0x001b 0x0>; 103 clock-names = "gpio"; 104}; 105 106Example for 66AK2HK/66AK2L/66AK2E: 107 108gpio0: gpio@260bf00 { 109 compatible = "ti,keystone-gpio"; 110 reg = <0x0260bf00 0x100>; 111 gpio-controller; 112 #gpio-cells = <2>; 113 /* HW Interrupts mapped to GPIO pins */ 114 interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>, 115 <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>, 116 <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>, 117 <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>, 118 <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>, 119 <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>, 120 <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>, 121 <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>, 122 <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>, 123 <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>, 124 <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>, 125 <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>, 126 <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>, 127 <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>, 128 <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>, 129 <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>, 130 <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>, 131 <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>, 132 <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>, 133 <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>, 134 <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>, 135 <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>, 136 <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>, 137 <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>, 138 <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>, 139 <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>, 140 <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>, 141 <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>, 142 <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>, 143 <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>, 144 <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>, 145 <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; 146 clocks = <&clkgpio>; 147 clock-names = "gpio"; 148 ti,ngpio = <32>; 149 ti,davinci-gpio-unbanked = <32>; 150}; 151 152Example for K3 AM654: 153 154wkup_gpio0: wkup_gpio0@42110000 { 155 compatible = "ti,am654-gpio", "ti,keystone-gpio"; 156 reg = <0x42110000 0x100>; 157 gpio-controller; 158 #gpio-cells = <2>; 159 interrupt-parent = <&intr_wkup_gpio>; 160 interrupts = <59 128>, <59 129>, <59 130>, <59 131>; 161 interrupt-controller; 162 #interrupt-cells = <2>; 163 ti,ngpio = <56>; 164 ti,davinci-gpio-unbanked = <0>; 165 clocks = <&k3_clks 59 0>; 166 clock-names = "gpio"; 167}; 168