1*ae5de77eSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*ae5de77eSEmmanuel Vadot%YAML 1.2 3*ae5de77eSEmmanuel Vadot--- 4*ae5de77eSEmmanuel Vadot$id: http://devicetree.org/schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml# 5*ae5de77eSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*ae5de77eSEmmanuel Vadot 7*ae5de77eSEmmanuel Vadottitle: Intel Stratix10 SoC FPGA Manager 8*ae5de77eSEmmanuel Vadot 9*ae5de77eSEmmanuel Vadotmaintainers: 10*ae5de77eSEmmanuel Vadot - Mahesh Rao <mahesh.rao@altera.com> 11*ae5de77eSEmmanuel Vadot - Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com> 12*ae5de77eSEmmanuel Vadot - Niravkumar L Rabara <nirav.rabara@altera.com> 13*ae5de77eSEmmanuel Vadot 14*ae5de77eSEmmanuel Vadotdescription: 15*ae5de77eSEmmanuel Vadot The Intel Stratix10 SoC consists of a 64-bit quad-core ARM Cortex A53 hard 16*ae5de77eSEmmanuel Vadot processor system (HPS) and a Secure Device Manager (SDM). The Stratix10 17*ae5de77eSEmmanuel Vadot SoC FPGA Manager driver is used to configure/reconfigure the FPGA fabric 18*ae5de77eSEmmanuel Vadot on the die.The driver communicates with SDM/ATF via the stratix10-svc 19*ae5de77eSEmmanuel Vadot platform driver for performing its operations. 20*ae5de77eSEmmanuel Vadot 21*ae5de77eSEmmanuel Vadotproperties: 22*ae5de77eSEmmanuel Vadot compatible: 23*ae5de77eSEmmanuel Vadot enum: 24*ae5de77eSEmmanuel Vadot - intel,stratix10-soc-fpga-mgr 25*ae5de77eSEmmanuel Vadot - intel,agilex-soc-fpga-mgr 26*ae5de77eSEmmanuel Vadot 27*ae5de77eSEmmanuel Vadotrequired: 28*ae5de77eSEmmanuel Vadot - compatible 29*ae5de77eSEmmanuel Vadot 30*ae5de77eSEmmanuel VadotadditionalProperties: false 31*ae5de77eSEmmanuel Vadot 32*ae5de77eSEmmanuel Vadotexamples: 33*ae5de77eSEmmanuel Vadot - | 34*ae5de77eSEmmanuel Vadot fpga-mgr { 35*ae5de77eSEmmanuel Vadot compatible = "intel,stratix10-soc-fpga-mgr"; 36*ae5de77eSEmmanuel Vadot }; 37