1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/firmware/qcom,scm.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: QCOM Secure Channel Manager (SCM) 8 9description: | 10 Qualcomm processors include an interface to communicate to the secure firmware. 11 This interface allows for clients to request different types of actions. 12 These can include CPU power up/down, HDCP requests, loading of firmware, 13 and other assorted actions. 14 15maintainers: 16 - Bjorn Andersson <bjorn.andersson@linaro.org> 17 - Robert Marko <robimarko@gmail.com> 18 - Guru Das Srinagesh <quic_gurus@quicinc.com> 19 20properties: 21 compatible: 22 items: 23 - enum: 24 - qcom,scm-apq8064 25 - qcom,scm-apq8084 26 - qcom,scm-ipq4019 27 - qcom,scm-ipq5332 28 - qcom,scm-ipq6018 29 - qcom,scm-ipq806x 30 - qcom,scm-ipq8074 31 - qcom,scm-ipq9574 32 - qcom,scm-mdm9607 33 - qcom,scm-msm8226 34 - qcom,scm-msm8660 35 - qcom,scm-msm8916 36 - qcom,scm-msm8953 37 - qcom,scm-msm8960 38 - qcom,scm-msm8974 39 - qcom,scm-msm8976 40 - qcom,scm-msm8994 41 - qcom,scm-msm8996 42 - qcom,scm-msm8998 43 - qcom,scm-qcm2290 44 - qcom,scm-qdu1000 45 - qcom,scm-sa8775p 46 - qcom,scm-sc7180 47 - qcom,scm-sc7280 48 - qcom,scm-sc8180x 49 - qcom,scm-sc8280xp 50 - qcom,scm-sdm670 51 - qcom,scm-sdm845 52 - qcom,scm-sdx55 53 - qcom,scm-sdx65 54 - qcom,scm-sm6115 55 - qcom,scm-sm6125 56 - qcom,scm-sm6350 57 - qcom,scm-sm6375 58 - qcom,scm-sm8150 59 - qcom,scm-sm8250 60 - qcom,scm-sm8350 61 - qcom,scm-sm8450 62 - qcom,scm-sm8550 63 - qcom,scm-qcs404 64 - const: qcom,scm 65 66 clocks: 67 minItems: 1 68 maxItems: 3 69 70 clock-names: 71 minItems: 1 72 maxItems: 3 73 74 dma-coherent: true 75 76 interconnects: 77 maxItems: 1 78 79 interconnect-names: 80 maxItems: 1 81 82 '#reset-cells': 83 const: 1 84 85 interrupts: 86 description: 87 The wait-queue interrupt that firmware raises as part of handshake 88 protocol to handle sleeping SCM calls. 89 maxItems: 1 90 91 qcom,dload-mode: 92 $ref: /schemas/types.yaml#/definitions/phandle-array 93 items: 94 - items: 95 - description: phandle to TCSR hardware block 96 - description: offset of the download mode control register 97 description: TCSR hardware block 98 99allOf: 100 # Clocks 101 - if: 102 properties: 103 compatible: 104 contains: 105 enum: 106 - qcom,scm-apq8064 107 - qcom,scm-apq8084 108 - qcom,scm-mdm9607 109 - qcom,scm-msm8226 110 - qcom,scm-msm8660 111 - qcom,scm-msm8916 112 - qcom,scm-msm8953 113 - qcom,scm-msm8960 114 - qcom,scm-msm8974 115 - qcom,scm-msm8976 116 - qcom,scm-qcm2290 117 - qcom,scm-sm6375 118 then: 119 required: 120 - clocks 121 - clock-names 122 else: 123 properties: 124 clock-names: false 125 clocks: false 126 127 - if: 128 properties: 129 compatible: 130 contains: 131 enum: 132 - qcom,scm-apq8064 133 - qcom,scm-msm8660 134 - qcom,scm-msm8960 135 - qcom,scm-qcm2290 136 - qcom,scm-sm6375 137 then: 138 properties: 139 clock-names: 140 items: 141 - const: core 142 143 clocks: 144 maxItems: 1 145 146 - if: 147 properties: 148 compatible: 149 contains: 150 enum: 151 - qcom,scm-apq8084 152 - qcom,scm-mdm9607 153 - qcom,scm-msm8226 154 - qcom,scm-msm8916 155 - qcom,scm-msm8953 156 - qcom,scm-msm8974 157 - qcom,scm-msm8976 158 then: 159 properties: 160 clock-names: 161 items: 162 - const: core 163 - const: bus 164 - const: iface 165 166 clocks: 167 minItems: 3 168 maxItems: 3 169 170 # Interconnects 171 - if: 172 not: 173 properties: 174 compatible: 175 contains: 176 enum: 177 - qcom,scm-qdu1000 178 - qcom,scm-sm8450 179 - qcom,scm-sm8550 180 then: 181 properties: 182 interconnects: false 183 184 # Interrupts 185 - if: 186 not: 187 properties: 188 compatible: 189 contains: 190 enum: 191 - qcom,scm-sm8450 192 - qcom,scm-sm8550 193 then: 194 properties: 195 interrupts: false 196 197required: 198 - compatible 199 200additionalProperties: false 201 202examples: 203 - | 204 #include <dt-bindings/clock/qcom,gcc-msm8916.h> 205 206 firmware { 207 scm { 208 compatible = "qcom,scm-msm8916", "qcom,scm"; 209 clocks = <&gcc GCC_CRYPTO_CLK>, 210 <&gcc GCC_CRYPTO_AXI_CLK>, 211 <&gcc GCC_CRYPTO_AHB_CLK>; 212 clock-names = "core", "bus", "iface"; 213 }; 214 }; 215