1QCOM Secure Channel Manager (SCM) 2 3Qualcomm processors include an interface to communicate to the secure firmware. 4This interface allows for clients to request different types of actions. These 5can include CPU power up/down, HDCP requests, loading of firmware, and other 6assorted actions. 7 8Required properties: 9- compatible: must contain one of the following: 10 * "qcom,scm-apq8064" 11 * "qcom,scm-apq8084" 12 * "qcom,scm-ipq4019" 13 * "qcom,scm-ipq806x" 14 * "qcom,scm-ipq8074" 15 * "qcom,scm-mdm9607" 16 * "qcom,scm-msm8226" 17 * "qcom,scm-msm8660" 18 * "qcom,scm-msm8916" 19 * "qcom,scm-msm8953" 20 * "qcom,scm-msm8960" 21 * "qcom,scm-msm8974" 22 * "qcom,scm-msm8976" 23 * "qcom,scm-msm8994" 24 * "qcom,scm-msm8996" 25 * "qcom,scm-msm8998" 26 * "qcom,scm-sc7180" 27 * "qcom,scm-sc7280" 28 * "qcom,scm-sdm845" 29 * "qcom,scm-sdx55" 30 * "qcom,scm-sm6350" 31 * "qcom,scm-sm8150" 32 * "qcom,scm-sm8250" 33 * "qcom,scm-sm8350" 34 * "qcom,scm-sm8450" 35 and: 36 * "qcom,scm" 37- clocks: Specifies clocks needed by the SCM interface, if any: 38 * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and 39 "qcom,scm-msm8960" 40 * core, iface and bus clocks required for "qcom,scm-apq8084", 41 "qcom,scm-msm8916", "qcom,scm-msm8953", "qcom,scm-msm8974" and "qcom,scm-msm8976" 42- clock-names: Must contain "core" for the core clock, "iface" for the interface 43 clock and "bus" for the bus clock per the requirements of the compatible. 44- qcom,dload-mode: phandle to the TCSR hardware block and offset of the 45 download mode control register (optional) 46 47Example for MSM8916: 48 49 firmware { 50 scm { 51 compatible = "qcom,msm8916", "qcom,scm"; 52 clocks = <&gcc GCC_CRYPTO_CLK> , 53 <&gcc GCC_CRYPTO_AXI_CLK>, 54 <&gcc GCC_CRYPTO_AHB_CLK>; 55 clock-names = "core", "bus", "iface"; 56 }; 57 }; 58