1QCOM Secure Channel Manager (SCM) 2 3Qualcomm processors include an interface to communicate to the secure firmware. 4This interface allows for clients to request different types of actions. These 5can include CPU power up/down, HDCP requests, loading of firmware, and other 6assorted actions. 7 8Required properties: 9- compatible: must contain one of the following: 10 * "qcom,scm-apq8064" 11 * "qcom,scm-apq8084" 12 * "qcom,scm-ipq4019" 13 * "qcom,scm-ipq806x" 14 * "qcom,scm-ipq8074" 15 * "qcom,scm-msm8660" 16 * "qcom,scm-msm8916" 17 * "qcom,scm-msm8960" 18 * "qcom,scm-msm8974" 19 * "qcom,scm-msm8994" 20 * "qcom,scm-msm8996" 21 * "qcom,scm-msm8998" 22 * "qcom,scm-sc7180" 23 * "qcom,scm-sc7280" 24 * "qcom,scm-sdm845" 25 * "qcom,scm-sdx55" 26 * "qcom,scm-sm8150" 27 * "qcom,scm-sm8250" 28 * "qcom,scm-sm8350" 29 and: 30 * "qcom,scm" 31- clocks: Specifies clocks needed by the SCM interface, if any: 32 * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and 33 "qcom,scm-msm8960" 34 * core, iface and bus clocks required for "qcom,scm-apq8084", 35 "qcom,scm-msm8916" and "qcom,scm-msm8974" 36- clock-names: Must contain "core" for the core clock, "iface" for the interface 37 clock and "bus" for the bus clock per the requirements of the compatible. 38- qcom,dload-mode: phandle to the TCSR hardware block and offset of the 39 download mode control register (optional) 40 41Example for MSM8916: 42 43 firmware { 44 scm { 45 compatible = "qcom,msm8916", "qcom,scm"; 46 clocks = <&gcc GCC_CRYPTO_CLK> , 47 <&gcc GCC_CRYPTO_AXI_CLK>, 48 <&gcc GCC_CRYPTO_AHB_CLK>; 49 clock-names = "core", "bus", "iface"; 50 }; 51 }; 52