1QCOM Secure Channel Manager (SCM) 2 3Qualcomm processors include an interface to communicate to the secure firmware. 4This interface allows for clients to request different types of actions. These 5can include CPU power up/down, HDCP requests, loading of firmware, and other 6assorted actions. 7 8Required properties: 9- compatible: must contain one of the following: 10 * "qcom,scm-apq8064" 11 * "qcom,scm-apq8084" 12 * "qcom,scm-ipq4019" 13 * "qcom,scm-ipq806x" 14 * "qcom,scm-ipq8074" 15 * "qcom,scm-mdm9607" 16 * "qcom,scm-msm8226" 17 * "qcom,scm-msm8660" 18 * "qcom,scm-msm8916" 19 * "qcom,scm-msm8953" 20 * "qcom,scm-msm8960" 21 * "qcom,scm-msm8974" 22 * "qcom,scm-msm8976" 23 * "qcom,scm-msm8994" 24 * "qcom,scm-msm8996" 25 * "qcom,scm-msm8998" 26 * "qcom,scm-qcs404" 27 * "qcom,scm-sc7180" 28 * "qcom,scm-sc7280" 29 * "qcom,scm-sm6125" 30 * "qcom,scm-sdm845" 31 * "qcom,scm-sdx55" 32 * "qcom,scm-sdx65" 33 * "qcom,scm-sm6350" 34 * "qcom,scm-sm8150" 35 * "qcom,scm-sm8250" 36 * "qcom,scm-sm8350" 37 * "qcom,scm-sm8450" 38 and: 39 * "qcom,scm" 40- clocks: Specifies clocks needed by the SCM interface, if any: 41 * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and 42 "qcom,scm-msm8960" 43 * core, iface and bus clocks required for "qcom,scm-apq8084", 44 "qcom,scm-msm8916", "qcom,scm-msm8953", "qcom,scm-msm8974" and "qcom,scm-msm8976" 45- clock-names: Must contain "core" for the core clock, "iface" for the interface 46 clock and "bus" for the bus clock per the requirements of the compatible. 47- qcom,dload-mode: phandle to the TCSR hardware block and offset of the 48 download mode control register (optional) 49- interconnects: Specifies the bandwidth requirements of the SCM interface (optional) 50 51Example for MSM8916: 52 53 firmware { 54 scm { 55 compatible = "qcom,msm8916", "qcom,scm"; 56 clocks = <&gcc GCC_CRYPTO_CLK> , 57 <&gcc GCC_CRYPTO_AXI_CLK>, 58 <&gcc GCC_CRYPTO_AHB_CLK>; 59 clock-names = "core", "bus", "iface"; 60 }; 61 }; 62