xref: /freebsd/sys/contrib/device-tree/Bindings/firmware/nvidia,tegra210-bpmp.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel VadotNVIDIA Tegra210 Boot and Power Management Processor (BPMP)
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotThe Boot and Power Management Processor (BPMP) is a co-processor found
4*c66ec88fSEmmanuel Vadotin Tegra210 SoC. It is designed to handle the early stages of the boot
5*c66ec88fSEmmanuel Vadotprocess as well as to assisting in entering deep low power state
6*c66ec88fSEmmanuel Vadot(suspend to ram), and also offloading DRAM memory clock scaling on
7*c66ec88fSEmmanuel Vadotsome platforms. The binding document defines the resources that would
8*c66ec88fSEmmanuel Vadotbe used by the BPMP T210 firmware driver, which can create the
9*c66ec88fSEmmanuel Vadotinterprocessor communication (IPC) between the CPU and BPMP.
10*c66ec88fSEmmanuel Vadot
11*c66ec88fSEmmanuel VadotRequired properties:
12*c66ec88fSEmmanuel Vadot- compatible
13*c66ec88fSEmmanuel Vadot    Array of strings
14*c66ec88fSEmmanuel Vadot    One of:
15*c66ec88fSEmmanuel Vadot    - "nvidia,tegra210-bpmp"
16*c66ec88fSEmmanuel Vadot- reg: physical base address and length for HW synchornization primitives
17*c66ec88fSEmmanuel Vadot       1) base address and length to Tegra 'atomics' hardware
18*c66ec88fSEmmanuel Vadot       2) base address and length to Tegra 'semaphore' hardware
19*c66ec88fSEmmanuel Vadot- interrupts: specifies the interrupt number for receiving messages ("rx")
20*c66ec88fSEmmanuel Vadot              and for triggering messages ("tx")
21*c66ec88fSEmmanuel Vadot
22*c66ec88fSEmmanuel VadotOptional properties:
23*c66ec88fSEmmanuel Vadot- #clock-cells : Should be 1 for platforms where DRAM clock control is
24*c66ec88fSEmmanuel Vadot                 offloaded to bpmp.
25*c66ec88fSEmmanuel Vadot
26*c66ec88fSEmmanuel VadotExample:
27*c66ec88fSEmmanuel Vadot
28*c66ec88fSEmmanuel Vadotbpmp@70016000 {
29*c66ec88fSEmmanuel Vadot	compatible = "nvidia,tegra210-bpmp";
30*c66ec88fSEmmanuel Vadot	reg = <0x0 0x70016000 0x0 0x2000
31*c66ec88fSEmmanuel Vadot	       0x0 0x60001000 0x0 0x1000>;
32*c66ec88fSEmmanuel Vadot	interrupts = <GIC_SPI 6 IRQ_TYPE_EDGE_RISING>,
33*c66ec88fSEmmanuel Vadot		     <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
34*c66ec88fSEmmanuel Vadot	interrupt-names = "tx", "rx";
35*c66ec88fSEmmanuel Vadot};
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