1Synopsys DesignWare AXI DMA Controller 2 3Required properties: 4- compatible: "snps,axi-dma-1.01a" 5- reg: Address range of the DMAC registers. This should include 6 all of the per-channel registers. 7- interrupt: Should contain the DMAC interrupt number. 8- dma-channels: Number of channels supported by hardware. 9- snps,dma-masters: Number of AXI masters supported by the hardware. 10- snps,data-width: Maximum AXI data width supported by hardware. 11 (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits) 12- snps,priority: Priority of channel. Array size is equal to the number of 13 dma-channels. Priority value must be programmed within [0:dma-channels-1] 14 range. (0 - minimum priority) 15- snps,block-size: Maximum block size supported by the controller channel. 16 Array size is equal to the number of dma-channels. 17 18Optional properties: 19- snps,axi-max-burst-len: Restrict master AXI burst length by value specified 20 in this property. If this property is missing the maximum AXI burst length 21 supported by DMAC is used. [1:256] 22 23Example: 24 25dmac: dma-controller@80000 { 26 compatible = "snps,axi-dma-1.01a"; 27 reg = <0x80000 0x400>; 28 clocks = <&core_clk>, <&cfgr_clk>; 29 clock-names = "core-clk", "cfgr-clk"; 30 interrupt-parent = <&intc>; 31 interrupts = <27>; 32 33 dma-channels = <4>; 34 snps,dma-masters = <2>; 35 snps,data-width = <3>; 36 snps,block-size = <4096 4096 4096 4096>; 37 snps,priority = <0 1 2 3>; 38 snps,axi-max-burst-len = <16>; 39}; 40