xref: /freebsd/sys/contrib/device-tree/Bindings/dma/sifive,fu540-c000-pdma.yaml (revision cb7aa33ac6cd46a5434798e50363136e64f3ae98)
1c66ec88fSEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0
2c66ec88fSEmmanuel Vadot%YAML 1.2
3c66ec88fSEmmanuel Vadot---
4c66ec88fSEmmanuel Vadot$id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml#
5c66ec88fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6c66ec88fSEmmanuel Vadot
7c66ec88fSEmmanuel Vadottitle: SiFive Unleashed Rev C000 Platform DMA
8c66ec88fSEmmanuel Vadot
9c66ec88fSEmmanuel Vadotmaintainers:
10c66ec88fSEmmanuel Vadot  - Green Wan <green.wan@sifive.com>
11c66ec88fSEmmanuel Vadot  - Palmer Debbelt <palmer@sifive.com>
12c66ec88fSEmmanuel Vadot  - Paul Walmsley <paul.walmsley@sifive.com>
13c66ec88fSEmmanuel Vadot
14c66ec88fSEmmanuel Vadotdescription: |
15c66ec88fSEmmanuel Vadot  Platform DMA is a DMA engine of SiFive Unleashed. It supports 4
16c66ec88fSEmmanuel Vadot  channels. Each channel has 2 interrupts. One is for DMA done and
17c66ec88fSEmmanuel Vadot  the other is for DME error.
18c66ec88fSEmmanuel Vadot
19c66ec88fSEmmanuel Vadot  In different SoC, DMA could be attached to different IRQ line.
20c66ec88fSEmmanuel Vadot  DT file need to be changed to meet the difference. For technical
21c66ec88fSEmmanuel Vadot  doc,
22c66ec88fSEmmanuel Vadot
23c66ec88fSEmmanuel Vadot  https://static.dev.sifive.com/FU540-C000-v1.0.pdf
24c66ec88fSEmmanuel Vadot
25c9ccf3a3SEmmanuel VadotallOf:
26*cb7aa33aSEmmanuel Vadot  - $ref: dma-controller.yaml#
27c9ccf3a3SEmmanuel Vadot
28c66ec88fSEmmanuel Vadotproperties:
29c66ec88fSEmmanuel Vadot  compatible:
30c66ec88fSEmmanuel Vadot    items:
31d5b0e70fSEmmanuel Vadot      - enum:
32d5b0e70fSEmmanuel Vadot          - sifive,fu540-c000-pdma
33d5b0e70fSEmmanuel Vadot      - const: sifive,pdma0
34d5b0e70fSEmmanuel Vadot    description:
35d5b0e70fSEmmanuel Vadot      Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
36d5b0e70fSEmmanuel Vadot      Supported compatible strings are -
37d5b0e70fSEmmanuel Vadot      "sifive,fu540-c000-pdma" for the SiFive PDMA v0 as integrated onto the
38d5b0e70fSEmmanuel Vadot      SiFive FU540 chip resp and "sifive,pdma0" for the SiFive PDMA v0 IP block
39d5b0e70fSEmmanuel Vadot      with no chip integration tweaks.
40c66ec88fSEmmanuel Vadot
41c66ec88fSEmmanuel Vadot  reg:
42c66ec88fSEmmanuel Vadot    maxItems: 1
43c66ec88fSEmmanuel Vadot
44c66ec88fSEmmanuel Vadot  interrupts:
45c66ec88fSEmmanuel Vadot    minItems: 1
46c66ec88fSEmmanuel Vadot    maxItems: 8
47c66ec88fSEmmanuel Vadot
48d5b0e70fSEmmanuel Vadot  dma-channels:
49d5b0e70fSEmmanuel Vadot    description: For backwards-compatibility, the default value is 4
50d5b0e70fSEmmanuel Vadot    minimum: 1
51d5b0e70fSEmmanuel Vadot    maximum: 4
52d5b0e70fSEmmanuel Vadot    default: 4
53d5b0e70fSEmmanuel Vadot
54c66ec88fSEmmanuel Vadot  '#dma-cells':
55c66ec88fSEmmanuel Vadot    const: 1
56c66ec88fSEmmanuel Vadot
57c66ec88fSEmmanuel Vadotrequired:
58c66ec88fSEmmanuel Vadot  - compatible
59c66ec88fSEmmanuel Vadot  - reg
60c66ec88fSEmmanuel Vadot  - interrupts
61c66ec88fSEmmanuel Vadot
62c9ccf3a3SEmmanuel VadotunevaluatedProperties: false
63c66ec88fSEmmanuel Vadot
64c66ec88fSEmmanuel Vadotexamples:
65c66ec88fSEmmanuel Vadot  - |
66c9ccf3a3SEmmanuel Vadot    dma-controller@3000000 {
67d5b0e70fSEmmanuel Vadot      compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
68c66ec88fSEmmanuel Vadot      reg = <0x3000000 0x8000>;
69d5b0e70fSEmmanuel Vadot      dma-channels = <4>;
70e67e8565SEmmanuel Vadot      interrupts = <23>, <24>, <25>, <26>, <27>, <28>, <29>, <30>;
71c66ec88fSEmmanuel Vadot      #dma-cells = <1>;
72c66ec88fSEmmanuel Vadot    };
73c66ec88fSEmmanuel Vadot
74c66ec88fSEmmanuel Vadot...
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