1QCOM ADM DMA Controller 2 3Required properties: 4- compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960 5- reg: Address range for DMA registers 6- interrupts: Should contain one interrupt shared by all channels 7- #dma-cells: must be <2>. First cell denotes the channel number. Second cell 8 denotes CRCI (client rate control interface) flow control assignment. 9- clocks: Should contain the core clock and interface clock. 10- clock-names: Must contain "core" for the core clock and "iface" for the 11 interface clock. 12- resets: Must contain an entry for each entry in reset names. 13- reset-names: Must include the following entries: 14 - clk 15 - c0 16 - c1 17 - c2 18- qcom,ee: indicates the security domain identifier used in the secure world. 19 20Example: 21 adm_dma: dma@18300000 { 22 compatible = "qcom,adm"; 23 reg = <0x18300000 0x100000>; 24 interrupts = <0 170 0>; 25 #dma-cells = <2>; 26 27 clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>; 28 clock-names = "core", "iface"; 29 30 resets = <&gcc ADM0_RESET>, 31 <&gcc ADM0_C0_RESET>, 32 <&gcc ADM0_C1_RESET>, 33 <&gcc ADM0_C2_RESET>; 34 reset-names = "clk", "c0", "c1", "c2"; 35 qcom,ee = <0>; 36 }; 37 38DMA clients must use the format descripted in the dma.txt file, using a three 39cell specifier for each channel. 40 41Each dmas request consists of 3 cells: 42 1. phandle pointing to the DMA controller 43 2. channel number 44 3. CRCI assignment, if applicable. If no CRCI flow control is required, use 0. 45 The CRCI is used for flow control. It identifies the peripheral device that 46 is the source/destination for the transferred data. 47 48Example: 49 50 spi4: spi@1a280000 { 51 spi-max-frequency = <50000000>; 52 53 pinctrl-0 = <&spi_pins>; 54 pinctrl-names = "default"; 55 56 cs-gpios = <&qcom_pinmux 20 0>; 57 58 dmas = <&adm_dma 6 9>, 59 <&adm_dma 5 10>; 60 dma-names = "rx", "tx"; 61 }; 62