xref: /freebsd/sys/contrib/device-tree/Bindings/dma/owl-dma.yaml (revision 6be3386466ab79a84b48429ae66244f21526d3df) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/owl-dma.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Actions Semi Owl SoCs DMA controller
8
9description: |
10  The OWL DMA is a general-purpose direct memory access controller capable of
11  supporting 10 and 12 independent DMA channels for S700 and S900 SoCs
12  respectively.
13
14maintainers:
15  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
16
17allOf:
18  - $ref: "dma-controller.yaml#"
19
20properties:
21  compatible:
22    enum:
23      - actions,s900-dma
24      - actions,s700-dma
25
26  reg:
27    maxItems: 1
28
29  interrupts:
30    description:
31      controller supports 4 interrupts, which are freely assignable to the
32      DMA channels.
33    maxItems: 4
34
35  "#dma-cells":
36    const: 1
37
38  dma-channels:
39    maximum: 12
40
41  dma-requests:
42    maximum: 46
43
44  clocks:
45    maxItems: 1
46    description:
47      Phandle and Specifier of the clock feeding the DMA controller.
48
49  power-domains:
50    maxItems: 1
51
52required:
53  - compatible
54  - reg
55  - interrupts
56  - "#dma-cells"
57  - dma-channels
58  - dma-requests
59  - clocks
60
61unevaluatedProperties: false
62
63examples:
64  - |
65    #include <dt-bindings/interrupt-controller/arm-gic.h>
66    dma: dma-controller@e0260000 {
67        compatible = "actions,s900-dma";
68        reg = <0xe0260000 0x1000>;
69        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
70                     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
71                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
72                     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
73        #dma-cells = <1>;
74        dma-channels = <12>;
75        dma-requests = <46>;
76        clocks = <&clock 22>;
77    };
78
79...
80