1c66ec88fSEmmanuel Vadot* NVIDIA Tegra APB DMA controller 2c66ec88fSEmmanuel Vadot 3c66ec88fSEmmanuel VadotRequired properties: 4c66ec88fSEmmanuel Vadot- compatible: Should be "nvidia,<chip>-apbdma" 5*aa1a8ff2SEmmanuel Vadot- reg: Should contain DMA registers location and length. This should include 6c66ec88fSEmmanuel Vadot all of the per-channel registers. 7c66ec88fSEmmanuel Vadot- interrupts: Should contain all of the per-channel DMA interrupts. 8c66ec88fSEmmanuel Vadot- clocks: Must contain one entry, for the module clock. 9c66ec88fSEmmanuel Vadot See ../clocks/clock-bindings.txt for details. 10c66ec88fSEmmanuel Vadot- resets : Must contain an entry for each entry in reset-names. 11c66ec88fSEmmanuel Vadot See ../reset/reset.txt for details. 12c66ec88fSEmmanuel Vadot- reset-names : Must include the following entries: 13c66ec88fSEmmanuel Vadot - dma 14c66ec88fSEmmanuel Vadot- #dma-cells : Must be <1>. This dictates the length of DMA specifiers in 15c66ec88fSEmmanuel Vadot client nodes' dmas properties. The specifier represents the DMA request 16c66ec88fSEmmanuel Vadot select value for the peripheral. For more details, consult the Tegra TRM's 17c66ec88fSEmmanuel Vadot documentation of the APB DMA channel control register REQ_SEL field. 18c66ec88fSEmmanuel Vadot 19c66ec88fSEmmanuel VadotExamples: 20c66ec88fSEmmanuel Vadot 21c66ec88fSEmmanuel Vadotapbdma: dma@6000a000 { 22c66ec88fSEmmanuel Vadot compatible = "nvidia,tegra20-apbdma"; 23c66ec88fSEmmanuel Vadot reg = <0x6000a000 0x1200>; 24c66ec88fSEmmanuel Vadot interrupts = < 0 136 0x04 25c66ec88fSEmmanuel Vadot 0 137 0x04 26c66ec88fSEmmanuel Vadot 0 138 0x04 27c66ec88fSEmmanuel Vadot 0 139 0x04 28c66ec88fSEmmanuel Vadot 0 140 0x04 29c66ec88fSEmmanuel Vadot 0 141 0x04 30c66ec88fSEmmanuel Vadot 0 142 0x04 31c66ec88fSEmmanuel Vadot 0 143 0x04 32c66ec88fSEmmanuel Vadot 0 144 0x04 33c66ec88fSEmmanuel Vadot 0 145 0x04 34c66ec88fSEmmanuel Vadot 0 146 0x04 35c66ec88fSEmmanuel Vadot 0 147 0x04 36c66ec88fSEmmanuel Vadot 0 148 0x04 37c66ec88fSEmmanuel Vadot 0 149 0x04 38c66ec88fSEmmanuel Vadot 0 150 0x04 39c66ec88fSEmmanuel Vadot 0 151 0x04 >; 40c66ec88fSEmmanuel Vadot clocks = <&tegra_car 34>; 41c66ec88fSEmmanuel Vadot resets = <&tegra_car 34>; 42c66ec88fSEmmanuel Vadot reset-names = "dma"; 43c66ec88fSEmmanuel Vadot #dma-cells = <1>; 44c66ec88fSEmmanuel Vadot}; 45