1*c66ec88fSEmmanuel Vadot* Marvell XOR v2 engines 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- compatible: one of the following values: 5*c66ec88fSEmmanuel Vadot "marvell,armada-7k-xor" 6*c66ec88fSEmmanuel Vadot "marvell,xor-v2" 7*c66ec88fSEmmanuel Vadot- reg: Should contain registers location and length (two sets) 8*c66ec88fSEmmanuel Vadot the first set is the DMA registers 9*c66ec88fSEmmanuel Vadot the second set is the global registers 10*c66ec88fSEmmanuel Vadot- msi-parent: Phandle to the MSI-capable interrupt controller used for 11*c66ec88fSEmmanuel Vadot interrupts. 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel VadotOptional properties: 14*c66ec88fSEmmanuel Vadot- clocks: Optional reference to the clocks used by the XOR engine. 15*c66ec88fSEmmanuel Vadot- clock-names: mandatory if there is a second clock, in this case the 16*c66ec88fSEmmanuel Vadot name must be "core" for the first clock and "reg" for the second 17*c66ec88fSEmmanuel Vadot one 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel VadotExample: 21*c66ec88fSEmmanuel Vadot 22*c66ec88fSEmmanuel Vadot xor0@400000 { 23*c66ec88fSEmmanuel Vadot compatible = "marvell,xor-v2"; 24*c66ec88fSEmmanuel Vadot reg = <0x400000 0x1000>, 25*c66ec88fSEmmanuel Vadot <0x410000 0x1000>; 26*c66ec88fSEmmanuel Vadot msi-parent = <&gic_v2m0>; 27*c66ec88fSEmmanuel Vadot dma-coherent; 28*c66ec88fSEmmanuel Vadot }; 29