1c66ec88fSEmmanuel Vadot* Mediatek UART APDMA Controller 2c66ec88fSEmmanuel Vadot 3c66ec88fSEmmanuel VadotRequired properties: 4c66ec88fSEmmanuel Vadot- compatible should contain: 5c66ec88fSEmmanuel Vadot * "mediatek,mt2712-uart-dma" for MT2712 compatible APDMA 6c66ec88fSEmmanuel Vadot * "mediatek,mt6577-uart-dma" for MT6577 and all of the above 7*5def4c47SEmmanuel Vadot * "mediatek,mt8516-uart-dma", "mediatek,mt6577" for MT8516 SoC 8c66ec88fSEmmanuel Vadot 9c66ec88fSEmmanuel Vadot- reg: The base address of the APDMA register bank. 10c66ec88fSEmmanuel Vadot 11c66ec88fSEmmanuel Vadot- interrupts: A single interrupt specifier. 12c66ec88fSEmmanuel Vadot One interrupt per dma-requests, or 8 if no dma-requests property is present 13c66ec88fSEmmanuel Vadot 14c66ec88fSEmmanuel Vadot- dma-requests: The number of DMA channels 15c66ec88fSEmmanuel Vadot 16c66ec88fSEmmanuel Vadot- clocks : Must contain an entry for each entry in clock-names. 17c66ec88fSEmmanuel Vadot See ../clocks/clock-bindings.txt for details. 18c66ec88fSEmmanuel Vadot- clock-names: The APDMA clock for register accesses 19c66ec88fSEmmanuel Vadot 20c66ec88fSEmmanuel Vadot- mediatek,dma-33bits: Present if the DMA requires support 21c66ec88fSEmmanuel Vadot 22c66ec88fSEmmanuel VadotExamples: 23c66ec88fSEmmanuel Vadot 24c66ec88fSEmmanuel Vadot apdma: dma-controller@11000400 { 25c66ec88fSEmmanuel Vadot compatible = "mediatek,mt2712-uart-dma", 26c66ec88fSEmmanuel Vadot "mediatek,mt6577-uart-dma"; 27c66ec88fSEmmanuel Vadot reg = <0 0x11000400 0 0x80>, 28c66ec88fSEmmanuel Vadot <0 0x11000480 0 0x80>, 29c66ec88fSEmmanuel Vadot <0 0x11000500 0 0x80>, 30c66ec88fSEmmanuel Vadot <0 0x11000580 0 0x80>, 31c66ec88fSEmmanuel Vadot <0 0x11000600 0 0x80>, 32c66ec88fSEmmanuel Vadot <0 0x11000680 0 0x80>, 33c66ec88fSEmmanuel Vadot <0 0x11000700 0 0x80>, 34c66ec88fSEmmanuel Vadot <0 0x11000780 0 0x80>, 35c66ec88fSEmmanuel Vadot <0 0x11000800 0 0x80>, 36c66ec88fSEmmanuel Vadot <0 0x11000880 0 0x80>, 37c66ec88fSEmmanuel Vadot <0 0x11000900 0 0x80>, 38c66ec88fSEmmanuel Vadot <0 0x11000980 0 0x80>; 39c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_LOW>, 40c66ec88fSEmmanuel Vadot <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>, 41c66ec88fSEmmanuel Vadot <GIC_SPI 105 IRQ_TYPE_LEVEL_LOW>, 42c66ec88fSEmmanuel Vadot <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>, 43c66ec88fSEmmanuel Vadot <GIC_SPI 107 IRQ_TYPE_LEVEL_LOW>, 44c66ec88fSEmmanuel Vadot <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>, 45c66ec88fSEmmanuel Vadot <GIC_SPI 109 IRQ_TYPE_LEVEL_LOW>, 46c66ec88fSEmmanuel Vadot <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>, 47c66ec88fSEmmanuel Vadot <GIC_SPI 111 IRQ_TYPE_LEVEL_LOW>, 48c66ec88fSEmmanuel Vadot <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>, 49c66ec88fSEmmanuel Vadot <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>, 50c66ec88fSEmmanuel Vadot <GIC_SPI 114 IRQ_TYPE_LEVEL_LOW>; 51c66ec88fSEmmanuel Vadot dma-requests = <12>; 52c66ec88fSEmmanuel Vadot clocks = <&pericfg CLK_PERI_AP_DMA>; 53c66ec88fSEmmanuel Vadot clock-names = "apdma"; 54c66ec88fSEmmanuel Vadot mediatek,dma-33bits; 55c66ec88fSEmmanuel Vadot #dma-cells = <1>; 56c66ec88fSEmmanuel Vadot }; 57