xref: /freebsd/sys/contrib/device-tree/Bindings/dma/ingenic,dma.yaml (revision cfd6422a5217410fbd66f7a7a8a64d9d85e61229) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/ingenic,dma.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Ingenic SoCs DMA Controller DT bindings
8
9maintainers:
10  - Paul Cercueil <paul@crapouillou.net>
11
12allOf:
13  - $ref: "dma-controller.yaml#"
14
15properties:
16  compatible:
17    enum:
18      - ingenic,jz4740-dma
19      - ingenic,jz4725b-dma
20      - ingenic,jz4770-dma
21      - ingenic,jz4780-dma
22      - ingenic,x1000-dma
23      - ingenic,x1830-dma
24
25  reg:
26    items:
27      - description: Channel-specific registers
28      - description: System control registers
29
30  interrupts:
31    maxItems: 1
32
33  clocks:
34    maxItems: 1
35
36  "#dma-cells":
37    const: 2
38    description: >
39      DMA clients must use the format described in dma.txt, giving a phandle
40      to the DMA controller plus the following 2 integer cells:
41
42      - Request type: The DMA request type for transfers to/from the
43        device on the allocated channel, as defined in the SoC documentation.
44
45      - Channel: If set to 0xffffffff, any available channel will be allocated
46        for the client. Otherwise, the exact channel specified will be used.
47        The channel should be reserved on the DMA controller using the
48        ingenic,reserved-channels property.
49
50  ingenic,reserved-channels:
51    $ref: /schemas/types.yaml#definitions/uint32
52    description: >
53      Bitmask of channels to reserve for devices that need a specific
54      channel. These channels will only be assigned when explicitely
55      requested by a client. The primary use for this is channels 0 and
56      1, which can be configured to have special behaviour for NAND/BCH
57      when using programmable firmware.
58
59required:
60  - compatible
61  - reg
62  - interrupts
63  - clocks
64
65examples:
66  - |
67    #include <dt-bindings/clock/jz4780-cgu.h>
68    dma: dma-controller@13420000 {
69      compatible = "ingenic,jz4780-dma";
70      reg = <0x13420000 0x400>, <0x13421000 0x40>;
71
72      interrupt-parent = <&intc>;
73      interrupts = <10>;
74
75      clocks = <&cgu JZ4780_CLK_PDMA>;
76
77      #dma-cells = <2>;
78
79      ingenic,reserved-channels = <0x3>;
80    };
81