12846c905SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 22846c905SEmmanuel Vadot%YAML 1.2 32846c905SEmmanuel Vadot--- 42846c905SEmmanuel Vadot$id: http://devicetree.org/schemas/dma/atmel,sama5d4-dma.yaml# 52846c905SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 62846c905SEmmanuel Vadot 72846c905SEmmanuel Vadottitle: Microchip AT91 Extensible Direct Memory Access Controller 82846c905SEmmanuel Vadot 92846c905SEmmanuel Vadotmaintainers: 102846c905SEmmanuel Vadot - Nicolas Ferre <nicolas.ferre@microchip.com> 112846c905SEmmanuel Vadot - Charan Pedumuru <charan.pedumuru@microchip.com> 122846c905SEmmanuel Vadot 132846c905SEmmanuel Vadotdescription: 142846c905SEmmanuel Vadot The DMA Controller (XDMAC) is a AHB-protocol central direct memory access 152846c905SEmmanuel Vadot controller. It performs peripheral data transfer and memory move operations 162846c905SEmmanuel Vadot over one or two bus ports through the unidirectional communication 172846c905SEmmanuel Vadot channel. Each channel is fully programmable and provides both peripheral 182846c905SEmmanuel Vadot or memory-to-memory transfers. The channel features are configurable at 192846c905SEmmanuel Vadot implementation. 202846c905SEmmanuel Vadot 212846c905SEmmanuel VadotallOf: 222846c905SEmmanuel Vadot - $ref: dma-controller.yaml# 232846c905SEmmanuel Vadot 242846c905SEmmanuel Vadotproperties: 252846c905SEmmanuel Vadot compatible: 262846c905SEmmanuel Vadot oneOf: 272846c905SEmmanuel Vadot - enum: 282846c905SEmmanuel Vadot - atmel,sama5d4-dma 292846c905SEmmanuel Vadot - microchip,sama7g5-dma 302846c905SEmmanuel Vadot - items: 312846c905SEmmanuel Vadot - enum: 322846c905SEmmanuel Vadot - microchip,sam9x60-dma 332846c905SEmmanuel Vadot - microchip,sam9x7-dma 342846c905SEmmanuel Vadot - const: atmel,sama5d4-dma 35*8ccc0d23SEmmanuel Vadot - items: 36*8ccc0d23SEmmanuel Vadot - const: microchip,sama7d65-dma 37*8ccc0d23SEmmanuel Vadot - const: microchip,sama7g5-dma 382846c905SEmmanuel Vadot 392846c905SEmmanuel Vadot "#dma-cells": 402846c905SEmmanuel Vadot description: | 412846c905SEmmanuel Vadot Represents the number of integer cells in the `dmas` property of client 422846c905SEmmanuel Vadot devices. The single cell specifies the channel configuration register: 432846c905SEmmanuel Vadot - bit 13: SIF (Source Interface Identifier) for memory interface. 442846c905SEmmanuel Vadot - bit 14: DIF (Destination Interface Identifier) for peripheral interface. 452846c905SEmmanuel Vadot - bit 30-24: PERID (Peripheral Identifier). 462846c905SEmmanuel Vadot const: 1 472846c905SEmmanuel Vadot 482846c905SEmmanuel Vadot reg: 492846c905SEmmanuel Vadot maxItems: 1 502846c905SEmmanuel Vadot 512846c905SEmmanuel Vadot interrupts: 522846c905SEmmanuel Vadot maxItems: 1 532846c905SEmmanuel Vadot 542846c905SEmmanuel Vadot clocks: 552846c905SEmmanuel Vadot maxItems: 1 562846c905SEmmanuel Vadot 572846c905SEmmanuel Vadot clock-names: 582846c905SEmmanuel Vadot const: dma_clk 592846c905SEmmanuel Vadot 602846c905SEmmanuel Vadotrequired: 612846c905SEmmanuel Vadot - compatible 622846c905SEmmanuel Vadot - reg 632846c905SEmmanuel Vadot - interrupts 642846c905SEmmanuel Vadot - clocks 652846c905SEmmanuel Vadot - clock-names 662846c905SEmmanuel Vadot - "#dma-cells" 672846c905SEmmanuel Vadot 682846c905SEmmanuel VadotunevaluatedProperties: false 692846c905SEmmanuel Vadot 702846c905SEmmanuel Vadotexamples: 712846c905SEmmanuel Vadot - | 722846c905SEmmanuel Vadot #include <dt-bindings/clock/at91.h> 732846c905SEmmanuel Vadot #include <dt-bindings/dma/at91.h> 742846c905SEmmanuel Vadot #include <dt-bindings/interrupt-controller/irq.h> 752846c905SEmmanuel Vadot dma-controller@f0008000 { 762846c905SEmmanuel Vadot compatible = "atmel,sama5d4-dma"; 772846c905SEmmanuel Vadot reg = <0xf0008000 0x1000>; 782846c905SEmmanuel Vadot interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 792846c905SEmmanuel Vadot #dma-cells = <1>; 802846c905SEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; 812846c905SEmmanuel Vadot clock-names = "dma_clk"; 822846c905SEmmanuel Vadot }; 83