xref: /freebsd/sys/contrib/device-tree/Bindings/dma/arm,pl330.yaml (revision 7fdf597e96a02165cfe22ff357b857d5fa15ed8a)
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/arm,pl330.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM PrimeCell PL330 DMA Controller
8
9maintainers:
10  - Vinod Koul <vkoul@kernel.org>
11
12description:
13  The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
14  between memory and peripherals or memory to memory.
15
16# We need a select here so we don't match all nodes with 'arm,primecell'
17select:
18  properties:
19    compatible:
20      contains:
21        const: arm,pl330
22  required:
23    - compatible
24
25allOf:
26  - $ref: dma-controller.yaml#
27  - $ref: /schemas/arm/primecell.yaml#
28
29properties:
30  compatible:
31    items:
32      - enum:
33          - arm,pl330
34      - const: arm,primecell
35
36  reg:
37    maxItems: 1
38
39  interrupts:
40    minItems: 1
41    maxItems: 32
42    description: A single combined interrupt or an interrupt per event
43
44  '#dma-cells':
45    const: 1
46    description: Contains the DMA request number for the consumer
47
48  arm,pl330-broken-no-flushp:
49    type: boolean
50    description: quirk for avoiding to execute DMAFLUSHP
51
52  arm,pl330-periph-burst:
53    type: boolean
54    description: quirk for performing burst transfer only
55
56  dma-coherent: true
57
58  iommus:
59    minItems: 1
60    maxItems: 9
61    description: Up to 1 IOMMU entry per DMA channel for writes and 1
62      IOMMU entry for reads.
63
64  power-domains:
65    maxItems: 1
66
67  resets:
68    minItems: 1
69    maxItems: 2
70
71  reset-names:
72    minItems: 1
73    items:
74      - const: dma
75      - const: dma-ocp
76
77required:
78  - compatible
79  - reg
80  - interrupts
81
82unevaluatedProperties: false
83
84examples:
85  - |
86    dma-controller@12680000 {
87        compatible = "arm,pl330", "arm,primecell";
88        reg = <0x12680000 0x1000>;
89        interrupts = <99>;
90        #dma-cells = <1>;
91    };
92...
93