1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NVIDIA Tegra Display Controller 8 9maintainers: 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 13properties: 14 $nodename: 15 pattern: "^dc@[0-9a-f]+$" 16 17 compatible: 18 oneOf: 19 - enum: 20 - nvidia,tegra20-dc 21 - nvidia,tegra30-dc 22 - nvidia,tegra114-dc 23 - nvidia,tegra124-dc 24 - nvidia,tegra210-dc 25 26 - items: 27 - const: nvidia,tegra124-dc 28 - const: nvidia,tegra132-dc 29 30 reg: 31 maxItems: 1 32 33 interrupts: 34 maxItems: 1 35 36 clocks: 37 minItems: 1 38 items: 39 - description: display controller pixel clock 40 - description: parent clock # optional 41 42 clock-names: 43 minItems: 1 44 items: 45 - const: dc 46 - const: parent # optional 47 48 resets: 49 items: 50 - description: module reset 51 52 reset-names: 53 items: 54 - const: dc 55 56 interconnect-names: true 57 interconnects: true 58 59 iommus: 60 maxItems: 1 61 62 operating-points-v2: true 63 64 power-domains: 65 items: 66 - description: phandle to the core power domain 67 68 memory-region: true 69 70 nvidia,head: 71 $ref: /schemas/types.yaml#/definitions/uint32 72 description: The number of the display controller head. This is used to setup the various 73 types of output to receive video data from the given head. 74 75 nvidia,outputs: 76 $ref: /schemas/types.yaml#/definitions/phandle-array 77 description: A list of phandles of outputs that this display controller can drive. 78 79 rgb: 80 type: object 81 82allOf: 83 - if: 84 properties: 85 compatible: 86 contains: 87 enum: 88 - nvidia,tegra20-dc 89 - nvidia,tegra30-dc 90 - nvidia,tegra114-dc 91 then: 92 properties: 93 interconnects: 94 items: 95 - description: window A memory client 96 - description: window B memory client 97 - description: window B memory client (vertical filter) 98 - description: window C memory client 99 - description: cursor memory client 100 101 interconnect-names: 102 items: 103 - const: wina 104 - const: winb 105 - const: winb-vfilter 106 - const: winc 107 - const: cursor 108 109 rgb: 110 description: Each display controller node has a child node, named "rgb", that represents 111 the RGB output associated with the controller. 112 type: object 113 properties: 114 nvidia,ddc-i2c-bus: 115 $ref: /schemas/types.yaml#/definitions/phandle 116 description: phandle of an I2C controller used for DDC EDID probing 117 118 nvidia,hpd-gpio: 119 description: specifies a GPIO used for hotplug detection 120 maxItems: 1 121 122 nvidia,edid: 123 $ref: /schemas/types.yaml#/definitions/uint8-array 124 description: supplies a binary EDID blob 125 126 nvidia,panel: 127 $ref: /schemas/types.yaml#/definitions/phandle 128 description: phandle of a display panel 129 130 - if: 131 properties: 132 compatible: 133 contains: 134 enum: 135 - nvidia,tegra124-dc 136 then: 137 properties: 138 interconnects: 139 minItems: 4 140 items: 141 - description: window A memory client 142 - description: window B memory client 143 - description: window C memory client 144 - description: cursor memory client 145 - description: window D memory client 146 - description: window T memory client 147 148 interconnect-names: 149 minItems: 4 150 items: 151 - const: wina 152 - const: winb 153 - const: winc 154 - const: cursor 155 - const: wind 156 - const: wint 157 158additionalProperties: false 159 160required: 161 - compatible 162 - reg 163 - interrupts 164 - clocks 165 - clock-names 166 - resets 167 - reset-names 168 169examples: 170 - | 171 #include <dt-bindings/clock/tegra20-car.h> 172 #include <dt-bindings/interrupt-controller/arm-gic.h> 173 174 dc@54200000 { 175 compatible = "nvidia,tegra20-dc"; 176 reg = <0x54200000 0x00040000>; 177 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 178 clocks = <&tegra_car TEGRA20_CLK_DISP1>; 179 clock-names = "dc"; 180 resets = <&tegra_car 27>; 181 reset-names = "dc"; 182 }; 183