1*b97ee269SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*b97ee269SEmmanuel Vadot%YAML 1.2 3*b97ee269SEmmanuel Vadot--- 4*b97ee269SEmmanuel Vadot$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-tvo.yaml# 5*b97ee269SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*b97ee269SEmmanuel Vadot 7*b97ee269SEmmanuel Vadottitle: NVIDIA Tegra TV Encoder Output 8*b97ee269SEmmanuel Vadot 9*b97ee269SEmmanuel Vadotmaintainers: 10*b97ee269SEmmanuel Vadot - Thierry Reding <thierry.reding@gmail.com> 11*b97ee269SEmmanuel Vadot - Jon Hunter <jonathanh@nvidia.com> 12*b97ee269SEmmanuel Vadot 13*b97ee269SEmmanuel Vadotproperties: 14*b97ee269SEmmanuel Vadot $nodename: 15*b97ee269SEmmanuel Vadot pattern: "^tvo@[0-9a-f]+$" 16*b97ee269SEmmanuel Vadot 17*b97ee269SEmmanuel Vadot compatible: 18*b97ee269SEmmanuel Vadot enum: 19*b97ee269SEmmanuel Vadot - nvidia,tegra20-tvo 20*b97ee269SEmmanuel Vadot - nvidia,tegra30-tvo 21*b97ee269SEmmanuel Vadot - nvidia,tegra114-tvo 22*b97ee269SEmmanuel Vadot 23*b97ee269SEmmanuel Vadot reg: 24*b97ee269SEmmanuel Vadot maxItems: 1 25*b97ee269SEmmanuel Vadot 26*b97ee269SEmmanuel Vadot interrupts: 27*b97ee269SEmmanuel Vadot maxItems: 1 28*b97ee269SEmmanuel Vadot 29*b97ee269SEmmanuel Vadot clocks: 30*b97ee269SEmmanuel Vadot items: 31*b97ee269SEmmanuel Vadot - description: module clock 32*b97ee269SEmmanuel Vadot 33*b97ee269SEmmanuel Vadot operating-points-v2: 34*b97ee269SEmmanuel Vadot $ref: "/schemas/types.yaml#/definitions/phandle" 35*b97ee269SEmmanuel Vadot 36*b97ee269SEmmanuel Vadot power-domains: 37*b97ee269SEmmanuel Vadot items: 38*b97ee269SEmmanuel Vadot - description: phandle to the core power domain 39*b97ee269SEmmanuel Vadot 40*b97ee269SEmmanuel VadotadditionalProperties: false 41*b97ee269SEmmanuel Vadot 42*b97ee269SEmmanuel Vadotrequired: 43*b97ee269SEmmanuel Vadot - compatible 44*b97ee269SEmmanuel Vadot - reg 45*b97ee269SEmmanuel Vadot - interrupts 46*b97ee269SEmmanuel Vadot - clocks 47*b97ee269SEmmanuel Vadot 48*b97ee269SEmmanuel Vadotexamples: 49*b97ee269SEmmanuel Vadot - | 50*b97ee269SEmmanuel Vadot #include <dt-bindings/clock/tegra20-car.h> 51*b97ee269SEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 52*b97ee269SEmmanuel Vadot 53*b97ee269SEmmanuel Vadot tvo@542c0000 { 54*b97ee269SEmmanuel Vadot compatible = "nvidia,tegra20-tvo"; 55*b97ee269SEmmanuel Vadot reg = <0x542c0000 0x00040000>; 56*b97ee269SEmmanuel Vadot interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 57*b97ee269SEmmanuel Vadot clocks = <&tegra_car TEGRA20_CLK_TVO>; 58*b97ee269SEmmanuel Vadot }; 59