1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: STMicroelectronics STM32 DSI host controller 8 9maintainers: 10 - Philippe Cornu <philippe.cornu@st.com> 11 - Yannick Fertre <yannick.fertre@st.com> 12 13description: 14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller. 15 16allOf: 17 - $ref: dsi-controller.yaml# 18 19properties: 20 compatible: 21 const: st,stm32-dsi 22 23 reg: 24 maxItems: 1 25 26 clocks: 27 items: 28 - description: Module Clock 29 - description: DSI bus clock 30 - description: Pixel clock 31 minItems: 2 32 maxItems: 3 33 34 clock-names: 35 items: 36 - const: pclk 37 - const: ref 38 - const: px_clk 39 minItems: 2 40 maxItems: 3 41 42 resets: 43 maxItems: 1 44 45 reset-names: 46 items: 47 - const: apb 48 49 phy-dsi-supply: 50 description: 51 Phandle of the regulator that provides the supply voltage. 52 53 ports: 54 type: object 55 description: 56 A node containing DSI input & output port nodes with endpoint 57 definitions as documented in 58 Documentation/devicetree/bindings/media/video-interfaces.txt 59 Documentation/devicetree/bindings/graph.txt 60 properties: 61 port@0: 62 type: object 63 description: 64 DSI input port node, connected to the ltdc rgb output port. 65 66 port@1: 67 type: object 68 description: 69 DSI output port node, connected to a panel or a bridge input port" 70 71required: 72 - "#address-cells" 73 - "#size-cells" 74 - compatible 75 - reg 76 - clocks 77 - clock-names 78 - ports 79 80unevaluatedProperties: false 81 82examples: 83 - | 84 #include <dt-bindings/interrupt-controller/arm-gic.h> 85 #include <dt-bindings/clock/stm32mp1-clks.h> 86 #include <dt-bindings/reset/stm32mp1-resets.h> 87 #include <dt-bindings/gpio/gpio.h> 88 dsi: dsi@5a000000 { 89 compatible = "st,stm32-dsi"; 90 reg = <0x5a000000 0x800>; 91 clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>; 92 clock-names = "pclk", "ref", "px_clk"; 93 resets = <&rcc DSI_R>; 94 reset-names = "apb"; 95 phy-dsi-supply = <®18>; 96 97 #address-cells = <1>; 98 #size-cells = <0>; 99 100 ports { 101 #address-cells = <1>; 102 #size-cells = <0>; 103 104 port@0 { 105 reg = <0>; 106 dsi_in: endpoint { 107 remote-endpoint = <<dc_ep1_out>; 108 }; 109 }; 110 111 port@1 { 112 reg = <1>; 113 dsi_out: endpoint { 114 remote-endpoint = <&panel_in>; 115 }; 116 }; 117 }; 118 119 panel-dsi@0 { 120 compatible = "orisetech,otm8009a"; 121 reg = <0>; 122 reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>; 123 power-supply = <&v3v3>; 124 125 port { 126 panel_in: endpoint { 127 remote-endpoint = <&dsi_out>; 128 }; 129 }; 130 }; 131 }; 132 133... 134 135