xref: /freebsd/sys/contrib/device-tree/Bindings/display/sprd/sprd,sharkl3-dpu.yaml (revision e67e85659c0de33e617e5fbf1028c6e8b49eee53)
1*e67e8565SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*e67e8565SEmmanuel Vadot%YAML 1.2
3*e67e8565SEmmanuel Vadot---
4*e67e8565SEmmanuel Vadot$id: http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dpu.yaml#
5*e67e8565SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*e67e8565SEmmanuel Vadot
7*e67e8565SEmmanuel Vadottitle: Unisoc Sharkl3 Display Processor Unit (DPU)
8*e67e8565SEmmanuel Vadot
9*e67e8565SEmmanuel Vadotmaintainers:
10*e67e8565SEmmanuel Vadot  - Kevin Tang <kevin.tang@unisoc.com>
11*e67e8565SEmmanuel Vadot
12*e67e8565SEmmanuel Vadotdescription: |
13*e67e8565SEmmanuel Vadot  DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs
14*e67e8565SEmmanuel Vadot  which transfers the image data from a video memory buffer to an internal
15*e67e8565SEmmanuel Vadot  LCD interface.
16*e67e8565SEmmanuel Vadot
17*e67e8565SEmmanuel Vadotproperties:
18*e67e8565SEmmanuel Vadot  compatible:
19*e67e8565SEmmanuel Vadot    const: sprd,sharkl3-dpu
20*e67e8565SEmmanuel Vadot
21*e67e8565SEmmanuel Vadot  reg:
22*e67e8565SEmmanuel Vadot    maxItems: 1
23*e67e8565SEmmanuel Vadot
24*e67e8565SEmmanuel Vadot  interrupts:
25*e67e8565SEmmanuel Vadot    maxItems: 1
26*e67e8565SEmmanuel Vadot
27*e67e8565SEmmanuel Vadot  clocks:
28*e67e8565SEmmanuel Vadot    minItems: 2
29*e67e8565SEmmanuel Vadot
30*e67e8565SEmmanuel Vadot  clock-names:
31*e67e8565SEmmanuel Vadot    items:
32*e67e8565SEmmanuel Vadot      - const: clk_src_128m
33*e67e8565SEmmanuel Vadot      - const: clk_src_384m
34*e67e8565SEmmanuel Vadot
35*e67e8565SEmmanuel Vadot  power-domains:
36*e67e8565SEmmanuel Vadot    maxItems: 1
37*e67e8565SEmmanuel Vadot
38*e67e8565SEmmanuel Vadot  iommus:
39*e67e8565SEmmanuel Vadot    maxItems: 1
40*e67e8565SEmmanuel Vadot
41*e67e8565SEmmanuel Vadot  port:
42*e67e8565SEmmanuel Vadot    type: object
43*e67e8565SEmmanuel Vadot    description:
44*e67e8565SEmmanuel Vadot      A port node with endpoint definitions as defined in
45*e67e8565SEmmanuel Vadot      Documentation/devicetree/bindings/media/video-interfaces.txt.
46*e67e8565SEmmanuel Vadot      That port should be the output endpoint, usually output to
47*e67e8565SEmmanuel Vadot      the associated DSI.
48*e67e8565SEmmanuel Vadot
49*e67e8565SEmmanuel Vadotrequired:
50*e67e8565SEmmanuel Vadot  - compatible
51*e67e8565SEmmanuel Vadot  - reg
52*e67e8565SEmmanuel Vadot  - interrupts
53*e67e8565SEmmanuel Vadot  - clocks
54*e67e8565SEmmanuel Vadot  - clock-names
55*e67e8565SEmmanuel Vadot  - port
56*e67e8565SEmmanuel Vadot
57*e67e8565SEmmanuel VadotadditionalProperties: false
58*e67e8565SEmmanuel Vadot
59*e67e8565SEmmanuel Vadotexamples:
60*e67e8565SEmmanuel Vadot  - |
61*e67e8565SEmmanuel Vadot    #include <dt-bindings/interrupt-controller/arm-gic.h>
62*e67e8565SEmmanuel Vadot    #include <dt-bindings/clock/sprd,sc9860-clk.h>
63*e67e8565SEmmanuel Vadot    dpu: dpu@63000000 {
64*e67e8565SEmmanuel Vadot        compatible = "sprd,sharkl3-dpu";
65*e67e8565SEmmanuel Vadot        reg = <0x63000000 0x1000>;
66*e67e8565SEmmanuel Vadot        interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
67*e67e8565SEmmanuel Vadot        clock-names = "clk_src_128m", "clk_src_384m";
68*e67e8565SEmmanuel Vadot
69*e67e8565SEmmanuel Vadot        clocks = <&pll CLK_TWPLL_128M>,
70*e67e8565SEmmanuel Vadot          <&pll CLK_TWPLL_384M>;
71*e67e8565SEmmanuel Vadot
72*e67e8565SEmmanuel Vadot        dpu_port: port {
73*e67e8565SEmmanuel Vadot            dpu_out: endpoint {
74*e67e8565SEmmanuel Vadot                remote-endpoint = <&dsi_in>;
75*e67e8565SEmmanuel Vadot            };
76*e67e8565SEmmanuel Vadot        };
77*e67e8565SEmmanuel Vadot    };
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