xref: /freebsd/sys/contrib/device-tree/Bindings/display/snps,arcpgu.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel VadotARC PGU
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotThis is a display controller found on several development boards produced
4*c66ec88fSEmmanuel Vadotby Synopsys. The ARC PGU is an RGB streamer that reads the data from a
5*c66ec88fSEmmanuel Vadotframebuffer and sends it to a single digital encoder (usually HDMI).
6*c66ec88fSEmmanuel Vadot
7*c66ec88fSEmmanuel VadotRequired properties:
8*c66ec88fSEmmanuel Vadot  - compatible: "snps,arcpgu"
9*c66ec88fSEmmanuel Vadot  - reg: Physical base address and length of the controller's registers.
10*c66ec88fSEmmanuel Vadot  - clocks: A list of phandle + clock-specifier pairs, one for each
11*c66ec88fSEmmanuel Vadot    entry in 'clock-names'.
12*c66ec88fSEmmanuel Vadot  - clock-names: A list of clock names. For ARC PGU it should contain:
13*c66ec88fSEmmanuel Vadot      - "pxlclk" for the clock feeding the output PLL of the controller.
14*c66ec88fSEmmanuel Vadot
15*c66ec88fSEmmanuel VadotRequired sub-nodes:
16*c66ec88fSEmmanuel Vadot  - port: The PGU connection to an encoder chip.
17*c66ec88fSEmmanuel Vadot
18*c66ec88fSEmmanuel VadotExample:
19*c66ec88fSEmmanuel Vadot
20*c66ec88fSEmmanuel Vadot/ {
21*c66ec88fSEmmanuel Vadot	...
22*c66ec88fSEmmanuel Vadot
23*c66ec88fSEmmanuel Vadot	pgu@XXXXXXXX {
24*c66ec88fSEmmanuel Vadot		compatible = "snps,arcpgu";
25*c66ec88fSEmmanuel Vadot		reg = <0xXXXXXXXX 0x400>;
26*c66ec88fSEmmanuel Vadot		clocks = <&clock_node>;
27*c66ec88fSEmmanuel Vadot		clock-names = "pxlclk";
28*c66ec88fSEmmanuel Vadot
29*c66ec88fSEmmanuel Vadot		port {
30*c66ec88fSEmmanuel Vadot			pgu_output: endpoint {
31*c66ec88fSEmmanuel Vadot				remote-endpoint = <&hdmi_enc_input>;
32*c66ec88fSEmmanuel Vadot			};
33*c66ec88fSEmmanuel Vadot		};
34*c66ec88fSEmmanuel Vadot	};
35*c66ec88fSEmmanuel Vadot};
36