xref: /freebsd/sys/contrib/device-tree/Bindings/display/samsung/samsung,fimd.yaml (revision c7046f76c2c027b00c0e6ba57cfd28f1a78f5e23) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/samsung/samsung,fimd.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung S3C/S5P/Exynos SoC Fully Interactive Mobile Display (FIMD)
8
9maintainers:
10  - Inki Dae <inki.dae@samsung.com>
11  - Joonyoung Shim <jy0922.shim@samsung.com>
12  - Seung-Woo Kim <sw0312.kim@samsung.com>
13  - Kyungmin Park <kyungmin.park@samsung.com>
14  - Krzysztof Kozlowski <krzk@kernel.org>
15
16properties:
17  compatible:
18    enum:
19      - samsung,s3c2443-fimd
20      - samsung,s3c6400-fimd
21      - samsung,s5pv210-fimd
22      - samsung,exynos3250-fimd
23      - samsung,exynos4210-fimd
24      - samsung,exynos5250-fimd
25      - samsung,exynos5420-fimd
26
27  '#address-cells':
28    const: 1
29
30  clocks:
31    minItems: 2
32    maxItems: 2
33
34  clock-names:
35    items:
36      - const: sclk_fimd
37      - const: fimd
38
39  display-timings:
40    $ref: ../panel/display-timings.yaml#
41
42  i80-if-timings:
43    type: object
44    description: |
45      Timing configuration for lcd i80 interface support.
46      The parameters are defined as::
47      VCLK(internal)  __|??????|_____|??????|_____|??????|_____|??????|_____|??
48                        :            :            :            :            :
49      Address Output  --:<XXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XX
50                        | cs-setup+1 |            :            :            :
51                        |<---------->|            :            :            :
52      Chip Select     ???????????????|____________:____________:____________|??
53                                     | wr-setup+1 |            | wr-hold+1  |
54                                     |<---------->|            |<---------->|
55      Write Enable    ????????????????????????????|____________|???????????????
56                                                  | wr-active+1|
57                                                  |<---------->|
58      Video Data      ----------------------------<XXXXXXXXXXXXXXXXXXXXXXXXX>--
59
60    properties:
61      cs-setup:
62        $ref: /schemas/types.yaml#/definitions/uint32
63        description:
64          Clock cycles for the active period of address signal is enabled until
65          chip select is enabled.
66        default: 0
67
68      wr-active:
69        $ref: /schemas/types.yaml#/definitions/uint32
70        description:
71          Clock cycles for the active period of CS is enabled.
72        default: 1
73
74      wr-hold:
75        $ref: /schemas/types.yaml#/definitions/uint32
76        description:
77          Clock cycles for the active period of CS is disabled until write
78          signal is disabled.
79        default: 0
80
81      wr-setup:
82        $ref: /schemas/types.yaml#/definitions/uint32
83        description:
84          Clock cycles for the active period of CS signal is enabled until
85          write signal is enabled.
86        default: 0
87
88  iommus:
89    minItems: 1
90    maxItems: 2
91
92  iommu-names:
93    items:
94      - const: m0
95      - const: m1
96
97  interrupts:
98    items:
99      - description: FIFO level
100      - description: VSYNC
101      - description: LCD system
102
103  interrupt-names:
104    items:
105      - const: fifo
106      - const: vsync
107      - const: lcd_sys
108
109  power-domains:
110    maxItems: 1
111
112  reg:
113    maxItems: 1
114
115  samsung,invert-vden:
116    type: boolean
117    description:
118      Video enable signal is inverted.
119
120  samsung,invert-vclk:
121    type: boolean
122    description:
123      Video clock signal is inverted.
124
125  samsung,sysreg:
126    $ref: /schemas/types.yaml#/definitions/phandle
127    description:
128      Phandle to System Register syscon.
129
130  '#size-cells':
131    const: 0
132
133patternProperties:
134  "^port@[0-4]+$":
135    $ref: /schemas/graph.yaml#/properties/port
136    description: |
137      Contains ports with port with index::
138       0 - for CAMIF0 input,
139       1 - for CAMIF1 input,
140       2 - for CAMIF2 input,
141       3 - for parallel output,
142       4 - for write-back interface
143
144required:
145  - compatible
146  - clocks
147  - clock-names
148  - interrupts
149  - interrupt-names
150  - reg
151
152allOf:
153  - if:
154      properties:
155        compatible:
156          contains:
157            const: samsung,exynos5420-fimd
158    then:
159      properties:
160        iommus:
161          minItems: 2
162          maxItems: 2
163
164additionalProperties: false
165
166examples:
167  - |
168    #include <dt-bindings/clock/exynos4.h>
169
170    fimd@11c00000 {
171        compatible = "samsung,exynos4210-fimd";
172        interrupt-parent = <&combiner>;
173        reg = <0x11c00000 0x20000>;
174        interrupt-names = "fifo", "vsync", "lcd_sys";
175        interrupts = <11 0>, <11 1>, <11 2>;
176        clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
177        clock-names = "sclk_fimd", "fimd";
178        power-domains = <&pd_lcd0>;
179        iommus = <&sysmmu_fimd0>;
180        samsung,sysreg = <&sys_reg>;
181
182        #address-cells = <1>;
183        #size-cells = <0>;
184
185        samsung,invert-vden;
186        samsung,invert-vclk;
187
188        pinctrl-0 = <&lcd_clk>, <&lcd_data24>;
189        pinctrl-names = "default";
190
191        port@3 {
192            reg = <3>;
193
194            fimd_dpi_ep: endpoint {
195                remote-endpoint = <&lcd_ep>;
196            };
197        };
198    };
199