1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip rk3066 HDMI controller 8 9maintainers: 10 - Sandy Huang <hjc@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 12 13properties: 14 compatible: 15 const: rockchip,rk3066-hdmi 16 17 reg: 18 maxItems: 1 19 20 interrupts: 21 maxItems: 1 22 23 clocks: 24 maxItems: 1 25 26 clock-names: 27 const: hclk 28 29 pinctrl-0: 30 maxItems: 2 31 32 pinctrl-names: 33 const: default 34 description: 35 Switch the iomux for the HPD/I2C pins to HDMI function. 36 37 power-domains: 38 maxItems: 1 39 40 rockchip,grf: 41 $ref: /schemas/types.yaml#/definitions/phandle 42 description: 43 This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1. 44 45 ports: 46 type: object 47 48 properties: 49 "#address-cells": 50 const: 1 51 52 "#size-cells": 53 const: 0 54 55 port@0: 56 type: object 57 description: 58 Port node with two endpoints, numbered 0 and 1, 59 connected respectively to vop0 and vop1. 60 61 port@1: 62 type: object 63 description: 64 Port node with one endpoint connected to a hdmi-connector node. 65 66 required: 67 - "#address-cells" 68 - "#size-cells" 69 - port@0 70 - port@1 71 72 additionalProperties: false 73 74required: 75 - compatible 76 - reg 77 - interrupts 78 - clocks 79 - clock-names 80 - pinctrl-0 81 - pinctrl-names 82 - power-domains 83 - rockchip,grf 84 - ports 85 86additionalProperties: false 87 88examples: 89 - | 90 #include <dt-bindings/clock/rk3066a-cru.h> 91 #include <dt-bindings/interrupt-controller/arm-gic.h> 92 #include <dt-bindings/pinctrl/rockchip.h> 93 #include <dt-bindings/power/rk3066-power.h> 94 hdmi: hdmi@10116000 { 95 compatible = "rockchip,rk3066-hdmi"; 96 reg = <0x10116000 0x2000>; 97 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 98 clocks = <&cru HCLK_HDMI>; 99 clock-names = "hclk"; 100 pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>; 101 pinctrl-names = "default"; 102 power-domains = <&power RK3066_PD_VIO>; 103 rockchip,grf = <&grf>; 104 105 ports { 106 #address-cells = <1>; 107 #size-cells = <0>; 108 hdmi_in: port@0 { 109 reg = <0>; 110 #address-cells = <1>; 111 #size-cells = <0>; 112 hdmi_in_vop0: endpoint@0 { 113 reg = <0>; 114 remote-endpoint = <&vop0_out_hdmi>; 115 }; 116 hdmi_in_vop1: endpoint@1 { 117 reg = <1>; 118 remote-endpoint = <&vop1_out_hdmi>; 119 }; 120 }; 121 hdmi_out: port@1 { 122 reg = <1>; 123 hdmi_out_con: endpoint { 124 remote-endpoint = <&hdmi_con_in>; 125 }; 126 }; 127 }; 128 }; 129 130 pinctrl { 131 hdmi { 132 hdmi_hpd: hdmi-hpd { 133 rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>; 134 }; 135 hdmii2c_xfer: hdmii2c-xfer { 136 rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>, 137 <0 RK_PA2 1 &pcfg_pull_none>; 138 }; 139 }; 140 }; 141