1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/rockchip/rockchip,inno-hdmi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip Innosilicon HDMI controller 8 9maintainers: 10 - Sandy Huang <hjc@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 12 13properties: 14 compatible: 15 enum: 16 - rockchip,rk3036-inno-hdmi 17 - rockchip,rk3128-inno-hdmi 18 19 reg: 20 maxItems: 1 21 22 interrupts: 23 maxItems: 1 24 25 clocks: 26 minItems: 1 27 items: 28 - description: The HDMI controller main clock 29 - description: The HDMI PHY reference clock 30 31 clock-names: 32 minItems: 1 33 items: 34 - const: pclk 35 - const: ref 36 37 power-domains: 38 maxItems: 1 39 40 ports: 41 $ref: /schemas/graph.yaml#/properties/ports 42 43 properties: 44 port@0: 45 $ref: /schemas/graph.yaml#/properties/port 46 description: 47 Port node with one endpoint connected to a vop node. 48 49 port@1: 50 $ref: /schemas/graph.yaml#/properties/port 51 description: 52 Port node with one endpoint connected to a hdmi-connector node. 53 54 required: 55 - port@0 56 - port@1 57 58required: 59 - compatible 60 - reg 61 - interrupts 62 - clocks 63 - clock-names 64 - pinctrl-0 65 - pinctrl-names 66 - ports 67 68allOf: 69 - if: 70 properties: 71 compatible: 72 contains: 73 const: rockchip,rk3036-inno-hdmi 74 75 then: 76 properties: 77 power-domains: false 78 79 - if: 80 properties: 81 compatible: 82 contains: 83 const: rockchip,rk3128-inno-hdmi 84 85 then: 86 properties: 87 clocks: 88 minItems: 2 89 clock-names: 90 minItems: 2 91 required: 92 - power-domains 93 94additionalProperties: false 95 96examples: 97 - | 98 #include <dt-bindings/clock/rk3036-cru.h> 99 #include <dt-bindings/interrupt-controller/arm-gic.h> 100 #include <dt-bindings/pinctrl/rockchip.h> 101 hdmi: hdmi@20034000 { 102 compatible = "rockchip,rk3036-inno-hdmi"; 103 reg = <0x20034000 0x4000>; 104 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 105 clocks = <&cru PCLK_HDMI>; 106 clock-names = "pclk"; 107 pinctrl-names = "default"; 108 pinctrl-0 = <&hdmi_ctl>; 109 110 ports { 111 #address-cells = <1>; 112 #size-cells = <0>; 113 114 hdmi_in: port@0 { 115 reg = <0>; 116 hdmi_in_vop: endpoint { 117 remote-endpoint = <&vop_out_hdmi>; 118 }; 119 }; 120 121 hdmi_out: port@1 { 122 reg = <1>; 123 hdmi_out_con: endpoint { 124 remote-endpoint = <&hdmi_con_in>; 125 }; 126 }; 127 }; 128 }; 129 130 pinctrl { 131 hdmi { 132 hdmi_ctl: hdmi-ctl { 133 rockchip,pins = <1 RK_PB0 1 &pcfg_pull_none>, 134 <1 RK_PB1 1 &pcfg_pull_none>, 135 <1 RK_PB2 1 &pcfg_pull_none>, 136 <1 RK_PB3 1 &pcfg_pull_none>; 137 }; 138 }; 139 }; 140