1Rockchip RK3399 specific extensions to the cdn Display Port 2================================ 3 4Required properties: 5- compatible: must be "rockchip,rk3399-cdn-dp" 6 7- reg: physical base address of the controller and length 8 9- clocks: from common clock binding: handle to dp clock. 10 11- clock-names: from common clock binding: 12 Required elements: "core-clk" "pclk" "spdif" "grf" 13 14- resets : a list of phandle + reset specifier pairs 15- reset-names : string of reset names 16 Required elements: "apb", "core", "dptx", "spdif" 17- power-domains : power-domain property defined with a phandle 18 to respective power domain. 19- assigned-clocks: main clock, should be <&cru SCLK_DP_CORE> 20- assigned-clock-rates : the DP core clk frequency, shall be: 100000000 21 22- rockchip,grf: this soc should set GRF regs, so need get grf here. 23 24- ports: contain a port nodes with endpoint definitions as defined in 25 Documentation/devicetree/bindings/media/video-interfaces.txt. 26 contained 2 endpoints, connecting to the output of vop. 27 28- phys: from general PHY binding: the phandle for the PHY device. 29 30- extcon: extcon specifier for the Power Delivery 31 32- #sound-dai-cells = it must be 1 if your system is using 2 DAIs: I2S, SPDIF 33 34------------------------------------------------------------------------------- 35 36Example: 37 cdn_dp: dp@fec00000 { 38 compatible = "rockchip,rk3399-cdn-dp"; 39 reg = <0x0 0xfec00000 0x0 0x100000>; 40 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 41 clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>, 42 <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>; 43 clock-names = "core-clk", "pclk", "spdif", "grf"; 44 assigned-clocks = <&cru SCLK_DP_CORE>; 45 assigned-clock-rates = <100000000>; 46 power-domains = <&power RK3399_PD_HDCP>; 47 phys = <&tcphy0_dp>, <&tcphy1_dp>; 48 resets = <&cru SRST_DPTX_SPDIF_REC>; 49 reset-names = "spdif"; 50 extcon = <&fusb0>, <&fusb1>; 51 rockchip,grf = <&grf>; 52 #address-cells = <1>; 53 #size-cells = <0>; 54 #sound-dai-cells = <1>; 55 56 ports { 57 #address-cells = <1>; 58 #size-cells = <0>; 59 60 dp_in: port { 61 #address-cells = <1>; 62 #size-cells = <0>; 63 dp_in_vopb: endpoint@0 { 64 reg = <0>; 65 remote-endpoint = <&vopb_out_dp>; 66 }; 67 68 dp_in_vopl: endpoint@1 { 69 reg = <1>; 70 remote-endpoint = <&vopl_out_dp>; 71 }; 72 }; 73 }; 74 }; 75