xref: /freebsd/sys/contrib/device-tree/Bindings/display/msm/dsi-controller-main.yaml (revision 5956d97f4b3204318ceb6aa9c77bd0bc6ea87a41) 
1# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Display DSI controller
8
9maintainers:
10  - Krishna Manikandan <mkrishn@codeaurora.org>
11
12allOf:
13  - $ref: "../dsi-controller.yaml#"
14
15properties:
16  compatible:
17    items:
18      - const: qcom,mdss-dsi-ctrl
19
20  reg:
21    maxItems: 1
22
23  reg-names:
24    const: dsi_ctrl
25
26  interrupts:
27    maxItems: 1
28
29  clocks:
30    items:
31      - description: Display byte clock
32      - description: Display byte interface clock
33      - description: Display pixel clock
34      - description: Display escape clock
35      - description: Display AHB clock
36      - description: Display AXI clock
37
38  clock-names:
39    items:
40      - const: byte
41      - const: byte_intf
42      - const: pixel
43      - const: core
44      - const: iface
45      - const: bus
46
47  phys:
48    maxItems: 1
49
50  phy-names:
51    const: dsi
52
53  "#address-cells": true
54
55  "#size-cells": true
56
57  syscon-sfpb:
58    description: A phandle to mmss_sfpb syscon node (only for DSIv2).
59    $ref: "/schemas/types.yaml#/definitions/phandle"
60
61  qcom,dual-dsi-mode:
62    type: boolean
63    description: |
64      Indicates if the DSI controller is driving a panel which needs
65      2 DSI links.
66
67  power-domains:
68    maxItems: 1
69
70  operating-points-v2: true
71
72  ports:
73    $ref: "/schemas/graph.yaml#/properties/ports"
74    description: |
75      Contains DSI controller input and output ports as children, each
76      containing one endpoint subnode.
77
78    properties:
79      port@0:
80        $ref: "/schemas/graph.yaml#/properties/port"
81        description: |
82          Input endpoints of the controller.
83        properties:
84          endpoint:
85            $ref: /schemas/media/video-interfaces.yaml#
86            unevaluatedProperties: false
87            properties:
88              data-lanes:
89                maxItems: 4
90                minItems: 4
91                items:
92                  enum: [ 0, 1, 2, 3 ]
93
94      port@1:
95        $ref: "/schemas/graph.yaml#/properties/port"
96        description: |
97          Output endpoints of the controller.
98        properties:
99          endpoint:
100            $ref: /schemas/media/video-interfaces.yaml#
101            unevaluatedProperties: false
102            properties:
103              data-lanes:
104                maxItems: 4
105                minItems: 4
106                items:
107                  enum: [ 0, 1, 2, 3 ]
108
109    required:
110      - port@0
111      - port@1
112
113required:
114  - compatible
115  - reg
116  - reg-names
117  - interrupts
118  - clocks
119  - clock-names
120  - phys
121  - phy-names
122  - power-domains
123  - operating-points-v2
124  - ports
125
126additionalProperties: false
127
128examples:
129  - |
130     #include <dt-bindings/interrupt-controller/arm-gic.h>
131     #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
132     #include <dt-bindings/clock/qcom,gcc-sdm845.h>
133     #include <dt-bindings/power/qcom-rpmpd.h>
134
135     dsi@ae94000 {
136           compatible = "qcom,mdss-dsi-ctrl";
137           reg = <0x0ae94000 0x400>;
138           reg-names = "dsi_ctrl";
139
140           #address-cells = <1>;
141           #size-cells = <0>;
142
143           interrupt-parent = <&mdss>;
144           interrupts = <4>;
145
146           clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
147                    <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
148                    <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
149                    <&dispcc DISP_CC_MDSS_ESC0_CLK>,
150                    <&dispcc DISP_CC_MDSS_AHB_CLK>,
151                    <&dispcc DISP_CC_MDSS_AXI_CLK>;
152           clock-names = "byte",
153                         "byte_intf",
154                         "pixel",
155                         "core",
156                         "iface",
157                         "bus";
158
159           phys = <&dsi0_phy>;
160           phy-names = "dsi";
161
162           power-domains = <&rpmhpd SC7180_CX>;
163           operating-points-v2 = <&dsi_opp_table>;
164
165           ports {
166                  #address-cells = <1>;
167                  #size-cells = <0>;
168
169                  port@0 {
170                          reg = <0>;
171                          dsi0_in: endpoint {
172                                   remote-endpoint = <&dpu_intf1_out>;
173                          };
174                  };
175
176                  port@1 {
177                          reg = <1>;
178                          dsi0_out: endpoint {
179                                   remote-endpoint = <&sn65dsi86_in>;
180                                   data-lanes = <0 1 2 3>;
181                          };
182                  };
183           };
184     };
185...
186