xref: /freebsd/sys/contrib/device-tree/Bindings/display/mediatek/mediatek,hdmi.yaml (revision 5956d97f4b3204318ceb6aa9c77bd0bc6ea87a41) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek HDMI Encoder Device Tree Bindings
8
9maintainers:
10  - CK Hu <ck.hu@mediatek.com>
11  - Jitao shi <jitao.shi@mediatek.com>
12
13description: |
14  The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from
15  its parallel input.
16
17properties:
18  compatible:
19    enum:
20      - mediatek,mt2701-hdmi
21      - mediatek,mt7623-hdmi
22      - mediatek,mt8167-hdmi
23      - mediatek,mt8173-hdmi
24
25  reg:
26    maxItems: 1
27
28  interrupts:
29    maxItems: 1
30
31  clocks:
32    items:
33      - description: Pixel Clock
34      - description: HDMI PLL
35      - description: Bit Clock
36      - description: S/PDIF Clock
37
38  clock-names:
39    items:
40      - const: pixel
41      - const: pll
42      - const: bclk
43      - const: spdif
44
45  phys:
46    maxItems: 1
47
48  phy-names:
49    items:
50      - const: hdmi
51
52  mediatek,syscon-hdmi:
53    $ref: '/schemas/types.yaml#/definitions/phandle-array'
54    maxItems: 1
55    description: |
56      phandle link and register offset to the system configuration registers.
57
58  ports:
59    $ref: /schemas/graph.yaml#/properties/ports
60
61    properties:
62      port@0:
63        $ref: /schemas/graph.yaml#/properties/port
64        description: |
65          Input port node. This port should be connected to a DPI output port.
66
67      port@1:
68        $ref: /schemas/graph.yaml#/properties/port
69        description: |
70          Output port node. This port should be connected to the input port of a connector
71          node that contains a ddc-i2c-bus property, or to the  input port of an attached
72          bridge chip, such as a SlimPort transmitter.
73
74    required:
75      - port@0
76      - port@1
77
78required:
79  - compatible
80  - reg
81  - interrupts
82  - clocks
83  - clock-names
84  - phys
85  - phy-names
86  - mediatek,syscon-hdmi
87  - ports
88
89additionalProperties: false
90
91examples:
92  - |
93    #include <dt-bindings/clock/mt8173-clk.h>
94    #include <dt-bindings/interrupt-controller/arm-gic.h>
95    #include <dt-bindings/interrupt-controller/irq.h>
96    hdmi0: hdmi@14025000 {
97        compatible = "mediatek,mt8173-hdmi";
98        reg = <0x14025000 0x400>;
99        interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_LOW>;
100        clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
101             <&mmsys CLK_MM_HDMI_PLLCK>,
102             <&mmsys CLK_MM_HDMI_AUDIO>,
103             <&mmsys CLK_MM_HDMI_SPDIF>;
104        clock-names = "pixel", "pll", "bclk", "spdif";
105        pinctrl-names = "default";
106        pinctrl-0 = <&hdmi_pin>;
107        phys = <&hdmi_phy>;
108        phy-names = "hdmi";
109        mediatek,syscon-hdmi = <&mmsys 0x900>;
110
111        ports {
112          #address-cells = <1>;
113          #size-cells = <0>;
114
115          port@0 {
116            reg = <0>;
117
118            hdmi0_in: endpoint {
119              remote-endpoint = <&dpi0_out>;
120            };
121          };
122
123          port@1 {
124            reg = <1>;
125
126            hdmi0_out: endpoint {
127              remote-endpoint = <&hdmi_con_in>;
128            };
129          };
130        };
131    };
132
133...
134