1c9ccf3a3SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c9ccf3a3SEmmanuel Vadot%YAML 1.2 3c9ccf3a3SEmmanuel Vadot--- 4c9ccf3a3SEmmanuel Vadot$id: http://devicetree.org/schemas/display/mediatek/mediatek,dither.yaml# 5c9ccf3a3SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6c9ccf3a3SEmmanuel Vadot 7c9ccf3a3SEmmanuel Vadottitle: Mediatek display dither processor 8c9ccf3a3SEmmanuel Vadot 9c9ccf3a3SEmmanuel Vadotmaintainers: 10c9ccf3a3SEmmanuel Vadot - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11c9ccf3a3SEmmanuel Vadot - Philipp Zabel <p.zabel@pengutronix.de> 12c9ccf3a3SEmmanuel Vadot 13c9ccf3a3SEmmanuel Vadotdescription: | 14c9ccf3a3SEmmanuel Vadot Mediatek display dither processor, namely DITHER, works by approximating 15c9ccf3a3SEmmanuel Vadot unavailable colors with available colors and by mixing and matching available 16c9ccf3a3SEmmanuel Vadot colors to mimic unavailable ones. 17c9ccf3a3SEmmanuel Vadot DITHER device node must be siblings to the central MMSYS_CONFIG node. 18c9ccf3a3SEmmanuel Vadot For a description of the MMSYS_CONFIG binding, see 19c9ccf3a3SEmmanuel Vadot Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 20c9ccf3a3SEmmanuel Vadot for details. 21c9ccf3a3SEmmanuel Vadot 22c9ccf3a3SEmmanuel Vadotproperties: 23c9ccf3a3SEmmanuel Vadot compatible: 24c9ccf3a3SEmmanuel Vadot oneOf: 25fac71e4eSEmmanuel Vadot - enum: 26fac71e4eSEmmanuel Vadot - mediatek,mt8183-disp-dither 27c9ccf3a3SEmmanuel Vadot - items: 28c9ccf3a3SEmmanuel Vadot - enum: 29d5b0e70fSEmmanuel Vadot - mediatek,mt8186-disp-dither 30cb7aa33aSEmmanuel Vadot - mediatek,mt8188-disp-dither 31c9ccf3a3SEmmanuel Vadot - mediatek,mt8192-disp-dither 32c9ccf3a3SEmmanuel Vadot - mediatek,mt8195-disp-dither 33*0e8011faSEmmanuel Vadot - mediatek,mt8365-disp-dither 34d5b0e70fSEmmanuel Vadot - const: mediatek,mt8183-disp-dither 35c9ccf3a3SEmmanuel Vadot 36c9ccf3a3SEmmanuel Vadot reg: 37c9ccf3a3SEmmanuel Vadot maxItems: 1 38c9ccf3a3SEmmanuel Vadot 39c9ccf3a3SEmmanuel Vadot interrupts: 40c9ccf3a3SEmmanuel Vadot maxItems: 1 41c9ccf3a3SEmmanuel Vadot 42c9ccf3a3SEmmanuel Vadot power-domains: 43c9ccf3a3SEmmanuel Vadot description: A phandle and PM domain specifier as defined by bindings of 44c9ccf3a3SEmmanuel Vadot the power controller specified by phandle. See 45c9ccf3a3SEmmanuel Vadot Documentation/devicetree/bindings/power/power-domain.yaml for details. 46c9ccf3a3SEmmanuel Vadot 47c9ccf3a3SEmmanuel Vadot clocks: 48c9ccf3a3SEmmanuel Vadot items: 49c9ccf3a3SEmmanuel Vadot - description: DITHER Clock 50c9ccf3a3SEmmanuel Vadot 51c9ccf3a3SEmmanuel Vadot mediatek,gce-client-reg: 52c9ccf3a3SEmmanuel Vadot description: The register of client driver can be configured by gce with 53c9ccf3a3SEmmanuel Vadot 4 arguments defined in this property, such as phandle of gce, subsys id, 54c9ccf3a3SEmmanuel Vadot register offset and size. Each GCE subsys id is mapping to a client 55c9ccf3a3SEmmanuel Vadot defined in the header include/dt-bindings/gce/<chip>-gce.h. 56c9ccf3a3SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/phandle-array 57c9ccf3a3SEmmanuel Vadot maxItems: 1 58c9ccf3a3SEmmanuel Vadot 59c9ccf3a3SEmmanuel Vadotrequired: 60c9ccf3a3SEmmanuel Vadot - compatible 61c9ccf3a3SEmmanuel Vadot - reg 62c9ccf3a3SEmmanuel Vadot - interrupts 63c9ccf3a3SEmmanuel Vadot - power-domains 64c9ccf3a3SEmmanuel Vadot - clocks 65c9ccf3a3SEmmanuel Vadot 66c9ccf3a3SEmmanuel VadotadditionalProperties: false 67c9ccf3a3SEmmanuel Vadot 68c9ccf3a3SEmmanuel Vadotexamples: 69c9ccf3a3SEmmanuel Vadot - | 70c9ccf3a3SEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 71c9ccf3a3SEmmanuel Vadot #include <dt-bindings/clock/mt8183-clk.h> 72c9ccf3a3SEmmanuel Vadot #include <dt-bindings/power/mt8183-power.h> 73c9ccf3a3SEmmanuel Vadot #include <dt-bindings/gce/mt8183-gce.h> 74c9ccf3a3SEmmanuel Vadot 75c9ccf3a3SEmmanuel Vadot soc { 76c9ccf3a3SEmmanuel Vadot #address-cells = <2>; 77c9ccf3a3SEmmanuel Vadot #size-cells = <2>; 78c9ccf3a3SEmmanuel Vadot 79c9ccf3a3SEmmanuel Vadot dither0: dither@14012000 { 80c9ccf3a3SEmmanuel Vadot compatible = "mediatek,mt8183-disp-dither"; 81c9ccf3a3SEmmanuel Vadot reg = <0 0x14012000 0 0x1000>; 82c9ccf3a3SEmmanuel Vadot interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_LOW>; 83c9ccf3a3SEmmanuel Vadot power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; 84c9ccf3a3SEmmanuel Vadot clocks = <&mmsys CLK_MM_DISP_DITHER0>; 85c9ccf3a3SEmmanuel Vadot mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>; 86c9ccf3a3SEmmanuel Vadot }; 87c9ccf3a3SEmmanuel Vadot }; 88