1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/intel,keembay-display.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Intel Keem Bay display controller 8 9maintainers: 10 - Anitha Chrisanthus <anitha.chrisanthus@intel.com> 11 - Edmond J Dea <edmund.j.dea@intel.com> 12 13properties: 14 compatible: 15 const: intel,keembay-display 16 17 reg: 18 items: 19 - description: LCD registers range 20 21 reg-names: 22 items: 23 - const: lcd 24 25 clocks: 26 items: 27 - description: LCD controller clock 28 - description: pll0 clock 29 30 clock-names: 31 items: 32 - const: clk_lcd 33 - const: clk_pll0 34 35 interrupts: 36 maxItems: 1 37 38 port: 39 $ref: /schemas/graph.yaml#/properties/port 40 description: Display output node to DSI. 41 42required: 43 - compatible 44 - reg 45 - reg-names 46 - clocks 47 - clock-names 48 - interrupts 49 - port 50 51additionalProperties: false 52 53examples: 54 - | 55 #include <dt-bindings/interrupt-controller/irq.h> 56 #include <dt-bindings/interrupt-controller/arm-gic.h> 57 58 display@20930000 { 59 compatible = "intel,keembay-display"; 60 reg = <0x20930000 0x3000>; 61 reg-names = "lcd"; 62 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 63 clocks = <&scmi_clk 0x83>, 64 <&scmi_clk 0x0>; 65 clock-names = "clk_lcd", "clk_pll0"; 66 67 port { 68 disp_out: endpoint { 69 remote-endpoint = <&dsi_in>; 70 }; 71 }; 72 }; 73