1Freescale imx21 Framebuffer 2 3This framebuffer driver supports devices imx1, imx21, imx25, and imx27. 4 5Required properties: 6- compatible : "fsl,<chip>-fb", chip should be imx1 or imx21 7- reg : Should contain 1 register ranges(address and length) 8- interrupts : One interrupt of the fb dev 9 10Required nodes: 11- display: Phandle to a display node as described in 12 Documentation/devicetree/bindings/display/panel/display-timing.txt 13 Additional, the display node has to define properties: 14 - bits-per-pixel: Bits per pixel 15 - fsl,pcr: LCDC PCR value 16 A display node may optionally define 17 - fsl,aus-mode: boolean to enable AUS mode (only for imx21) 18 19Optional properties: 20- lcd-supply: Regulator for LCD supply voltage. 21- fsl,dmacr: DMA Control Register value. This is optional. By default, the 22 register is not modified as recommended by the datasheet. 23- fsl,lpccr: Contrast Control Register value. This property provides the 24 default value for the contrast control register. 25 If that property is omitted, the register is zeroed. 26- fsl,lscr1: LCDC Sharp Configuration Register value. 27 28Example: 29 30 imxfb: fb@10021000 { 31 compatible = "fsl,imx21-fb"; 32 interrupts = <61>; 33 reg = <0x10021000 0x1000>; 34 display = <&display0>; 35 }; 36 37 ... 38 39 display0: display0 { 40 model = "Primeview-PD050VL1"; 41 bits-per-pixel = <16>; 42 fsl,pcr = <0xf0c88080>; /* non-standard but required */ 43 display-timings { 44 native-mode = <&timing_disp0>; 45 timing_disp0: 640x480 { 46 hactive = <640>; 47 vactive = <480>; 48 hback-porch = <112>; 49 hfront-porch = <36>; 50 hsync-len = <32>; 51 vback-porch = <33>; 52 vfront-porch = <33>; 53 vsync-len = <2>; 54 clock-frequency = <25000000>; 55 }; 56 }; 57 }; 58