1*c66ec88fSEmmanuel VadotFreescale imx21 Framebuffer 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotThis framebuffer driver supports devices imx1, imx21, imx25, and imx27. 4*c66ec88fSEmmanuel Vadot 5*c66ec88fSEmmanuel VadotRequired properties: 6*c66ec88fSEmmanuel Vadot- compatible : "fsl,<chip>-fb", chip should be imx1 or imx21 7*c66ec88fSEmmanuel Vadot- reg : Should contain 1 register ranges(address and length) 8*c66ec88fSEmmanuel Vadot- interrupts : One interrupt of the fb dev 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel VadotRequired nodes: 11*c66ec88fSEmmanuel Vadot- display: Phandle to a display node as described in 12*c66ec88fSEmmanuel Vadot Documentation/devicetree/bindings/display/panel/display-timing.txt 13*c66ec88fSEmmanuel Vadot Additional, the display node has to define properties: 14*c66ec88fSEmmanuel Vadot - bits-per-pixel: Bits per pixel 15*c66ec88fSEmmanuel Vadot - fsl,pcr: LCDC PCR value 16*c66ec88fSEmmanuel Vadot A display node may optionally define 17*c66ec88fSEmmanuel Vadot - fsl,aus-mode: boolean to enable AUS mode (only for imx21) 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel VadotOptional properties: 20*c66ec88fSEmmanuel Vadot- lcd-supply: Regulator for LCD supply voltage. 21*c66ec88fSEmmanuel Vadot- fsl,dmacr: DMA Control Register value. This is optional. By default, the 22*c66ec88fSEmmanuel Vadot register is not modified as recommended by the datasheet. 23*c66ec88fSEmmanuel Vadot- fsl,lpccr: Contrast Control Register value. This property provides the 24*c66ec88fSEmmanuel Vadot default value for the contrast control register. 25*c66ec88fSEmmanuel Vadot If that property is omitted, the register is zeroed. 26*c66ec88fSEmmanuel Vadot- fsl,lscr1: LCDC Sharp Configuration Register value. 27*c66ec88fSEmmanuel Vadot 28*c66ec88fSEmmanuel VadotExample: 29*c66ec88fSEmmanuel Vadot 30*c66ec88fSEmmanuel Vadot imxfb: fb@10021000 { 31*c66ec88fSEmmanuel Vadot compatible = "fsl,imx21-fb"; 32*c66ec88fSEmmanuel Vadot interrupts = <61>; 33*c66ec88fSEmmanuel Vadot reg = <0x10021000 0x1000>; 34*c66ec88fSEmmanuel Vadot display = <&display0>; 35*c66ec88fSEmmanuel Vadot }; 36*c66ec88fSEmmanuel Vadot 37*c66ec88fSEmmanuel Vadot ... 38*c66ec88fSEmmanuel Vadot 39*c66ec88fSEmmanuel Vadot display0: display0 { 40*c66ec88fSEmmanuel Vadot model = "Primeview-PD050VL1"; 41*c66ec88fSEmmanuel Vadot bits-per-pixel = <16>; 42*c66ec88fSEmmanuel Vadot fsl,pcr = <0xf0c88080>; /* non-standard but required */ 43*c66ec88fSEmmanuel Vadot display-timings { 44*c66ec88fSEmmanuel Vadot native-mode = <&timing_disp0>; 45*c66ec88fSEmmanuel Vadot timing_disp0: 640x480 { 46*c66ec88fSEmmanuel Vadot hactive = <640>; 47*c66ec88fSEmmanuel Vadot vactive = <480>; 48*c66ec88fSEmmanuel Vadot hback-porch = <112>; 49*c66ec88fSEmmanuel Vadot hfront-porch = <36>; 50*c66ec88fSEmmanuel Vadot hsync-len = <32>; 51*c66ec88fSEmmanuel Vadot vback-porch = <33>; 52*c66ec88fSEmmanuel Vadot vfront-porch = <33>; 53*c66ec88fSEmmanuel Vadot vsync-len = <2>; 54*c66ec88fSEmmanuel Vadot clock-frequency = <25000000>; 55*c66ec88fSEmmanuel Vadot }; 56*c66ec88fSEmmanuel Vadot }; 57*c66ec88fSEmmanuel Vadot }; 58