1*c66ec88fSEmmanuel VadotDevice Tree bindings for Freescale DCU DRM Driver 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- compatible: Should be one of 5*c66ec88fSEmmanuel Vadot * "fsl,ls1021a-dcu". 6*c66ec88fSEmmanuel Vadot * "fsl,vf610-dcu". 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel Vadot- reg: Address and length of the register set for dcu. 9*c66ec88fSEmmanuel Vadot- clocks: Handle to "dcu" and "pix" clock (in the order below) 10*c66ec88fSEmmanuel Vadot This can be the same clock (e.g. LS1021a) 11*c66ec88fSEmmanuel Vadot See ../clocks/clock-bindings.txt for details. 12*c66ec88fSEmmanuel Vadot- clock-names: Should be "dcu" and "pix" 13*c66ec88fSEmmanuel Vadot See ../clocks/clock-bindings.txt for details. 14*c66ec88fSEmmanuel Vadot- big-endian Boolean property, LS1021A DCU registers are big-endian. 15*c66ec88fSEmmanuel Vadot- port Video port for the panel output 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel VadotOptional properties: 18*c66ec88fSEmmanuel Vadot- fsl,tcon: The phandle to the timing controller node. 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel VadotExamples: 21*c66ec88fSEmmanuel Vadotdcu: dcu@2ce0000 { 22*c66ec88fSEmmanuel Vadot compatible = "fsl,ls1021a-dcu"; 23*c66ec88fSEmmanuel Vadot reg = <0x0 0x2ce0000 0x0 0x10000>; 24*c66ec88fSEmmanuel Vadot clocks = <&platform_clk 0>, <&platform_clk 0>; 25*c66ec88fSEmmanuel Vadot clock-names = "dcu", "pix"; 26*c66ec88fSEmmanuel Vadot big-endian; 27*c66ec88fSEmmanuel Vadot fsl,tcon = <&tcon>; 28*c66ec88fSEmmanuel Vadot 29*c66ec88fSEmmanuel Vadot port { 30*c66ec88fSEmmanuel Vadot dcu_out: endpoint { 31*c66ec88fSEmmanuel Vadot remote-endpoint = <&panel_out>; 32*c66ec88fSEmmanuel Vadot }; 33*c66ec88fSEmmanuel Vadot }; 34*c66ec88fSEmmanuel Vadot}; 35